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| author | Joakim Tjernlund <joakim.tjernlund@transmode.se> | 2015-10-14 16:32:00 +0200 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-10-30 09:19:41 -0700 |
| commit | e368c206079bf7835000634247f3a8bfbba599ba (patch) | |
| tree | d6ecbdfa0bbed48528fbd9a7fc82ddb334e5b7d2 | |
| parent | 4632ad773ed31f4dd6aeb859de148402f8932111 (diff) | |
| download | u-boot-imx-e368c206079bf7835000634247f3a8bfbba599ba.zip u-boot-imx-e368c206079bf7835000634247f3a8bfbba599ba.tar.gz u-boot-imx-e368c206079bf7835000634247f3a8bfbba599ba.tar.bz2 | |
drivers/ddr/fsl_ddr: Make SR_IE configurable
SR_IE(Self-refresh interrupt enable) is needed for
Hardware Based Self-Refresh. Make it configurable and let
board code handle the rest.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Reviewed-by: York Sun <yorksun@freescale.com>
| -rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 2 | ||||
| -rw-r--r-- | include/fsl_ddr_sdram.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 8367c95..8543679 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -858,7 +858,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, break; } } - + sr_ie = popts->self_refresh_interrupt_en; num_pr = 1; /* Make this configurable */ /* diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index e5b6e03..c79fce0 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -324,6 +324,8 @@ typedef struct memctl_options_s { unsigned int dqs_config; /* Use DQS? maybe only with DDR2? */ /* SREN - self-refresh during sleep */ unsigned int self_refresh_in_sleep; + /* SR_IE - Self-refresh interrupt enable */ + unsigned int self_refresh_interrupt_en; unsigned int dynamic_power; /* DYN_PWR */ /* memory data width to use (16-bit, 32-bit, 64-bit) */ unsigned int data_bus_width; |