summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2015-07-06 12:54:24 -0600
committerSimon Glass <sjg@chromium.org>2015-07-21 17:39:30 -0600
commit6a1c7cef14a41ade84bccdded1fd87b908b6958c (patch)
treef411334af8078f63b3767ba6bccc1e1167e4b463
parentc02790ce12f3bf01a49fbef71da64322fde863e6 (diff)
downloadu-boot-imx-6a1c7cef14a41ade84bccdded1fd87b908b6958c.zip
u-boot-imx-6a1c7cef14a41ade84bccdded1fd87b908b6958c.tar.gz
u-boot-imx-6a1c7cef14a41ade84bccdded1fd87b908b6958c.tar.bz2
dm: test: Add tests for the clk uclass
Add tests of each API call using a sandbox clock device. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/sandbox/dts/test.dts4
-rw-r--r--arch/sandbox/include/asm/test.h11
-rw-r--r--configs/sandbox_defconfig1
-rw-r--r--drivers/clk/Makefile1
-rw-r--r--drivers/clk/clk_sandbox.c85
-rw-r--r--test/dm/Makefile1
-rw-r--r--test/dm/clk.c59
7 files changed, 162 insertions, 0 deletions
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index c25614a..3c9abb3 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -105,6 +105,10 @@
compatible = "denx,u-boot-fdt-test";
};
+ clk@0 {
+ compatible = "sandbox,clk";
+ };
+
eth@10002000 {
compatible = "sandbox,eth";
reg = <0x10002000 0x1000>;
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 91a5c79..28e9c09 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -17,6 +17,17 @@
#define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
#define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
+#define SANDBOX_CLK_RATE 32768
+
+enum {
+ PERIPH_ID_FIRST = 0,
+ PERIPH_ID_SPI = PERIPH_ID_FIRST,
+ PERIPH_ID_I2C,
+ PERIPH_ID_PCI,
+
+ PERIPH_ID_COUNT,
+};
+
/**
* sandbox_i2c_set_test_mode() - set test mode for running unit tests
*
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7aea381..29e7b5b 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -45,3 +45,4 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_CLK=y
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index b51cf23..bb89fb9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -6,3 +6,4 @@
#
obj-$(CONFIG_CLK) += clk-uclass.o
+obj-$(CONFIG_SANDBOX) += clk_sandbox.o
diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c
new file mode 100644
index 0000000..058225a
--- /dev/null
+++ b/drivers/clk/clk_sandbox.c
@@ -0,0 +1,85 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/test.h>
+
+struct sandbox_clk_priv {
+ ulong rate;
+ ulong periph_rate[PERIPH_ID_COUNT];
+};
+
+static ulong sandbox_clk_get_rate(struct udevice *dev)
+{
+ struct sandbox_clk_priv *priv = dev_get_priv(dev);
+
+ return priv->rate;
+}
+
+static ulong sandbox_clk_set_rate(struct udevice *dev, ulong rate)
+{
+ struct sandbox_clk_priv *priv = dev_get_priv(dev);
+
+ if (!rate)
+ return -EINVAL;
+ priv->rate = rate;
+ return 0;
+}
+
+ulong sandbox_get_periph_rate(struct udevice *dev, int periph)
+{
+ struct sandbox_clk_priv *priv = dev_get_priv(dev);
+
+ if (periph < PERIPH_ID_FIRST || periph >= PERIPH_ID_COUNT)
+ return -EINVAL;
+ return priv->periph_rate[periph];
+}
+
+ulong sandbox_set_periph_rate(struct udevice *dev, int periph, ulong rate)
+{
+ struct sandbox_clk_priv *priv = dev_get_priv(dev);
+ ulong old_rate;
+
+ if (periph < PERIPH_ID_FIRST || periph >= PERIPH_ID_COUNT)
+ return -EINVAL;
+ old_rate = priv->periph_rate[periph];
+ priv->periph_rate[periph] = rate;
+
+ return old_rate;
+}
+
+static int sandbox_clk_probe(struct udevice *dev)
+{
+ struct sandbox_clk_priv *priv = dev_get_priv(dev);
+
+ priv->rate = SANDBOX_CLK_RATE;
+
+ return 0;
+}
+
+static struct clk_ops sandbox_clk_ops = {
+ .get_rate = sandbox_clk_get_rate,
+ .set_rate = sandbox_clk_set_rate,
+ .get_periph_rate = sandbox_get_periph_rate,
+ .set_periph_rate = sandbox_set_periph_rate,
+};
+
+static const struct udevice_id sandbox_clk_ids[] = {
+ { .compatible = "sandbox,clk" },
+ { }
+};
+
+U_BOOT_DRIVER(clk_sandbox) = {
+ .name = "clk_sandbox",
+ .id = UCLASS_CLK,
+ .of_match = sandbox_clk_ids,
+ .ops = &sandbox_clk_ops,
+ .priv_auto_alloc_size = sizeof(struct sandbox_clk_priv),
+ .probe = sandbox_clk_probe,
+};
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 19ad2fb..7947545 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_UT_DM) += test-uclass.o
# subsystem you must add sandbox tests here.
obj-$(CONFIG_UT_DM) += core.o
ifneq ($(CONFIG_SANDBOX),)
+obj-$(CONFIG_CLK) += clk.o
obj-$(CONFIG_DM_ETH) += eth.o
obj-$(CONFIG_DM_GPIO) += gpio.o
obj-$(CONFIG_DM_I2C) += i2c.o
diff --git a/test/dm/clk.c b/test/dm/clk.c
new file mode 100644
index 0000000..9ff6d95
--- /dev/null
+++ b/test/dm/clk.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <linux/err.h>
+#include <test/ut.h>
+
+/* Test that we can find and adjust clocks */
+static int dm_test_clk_base(struct unit_test_state *uts)
+{
+ struct udevice *clk;
+ ulong rate;
+
+ ut_assertok(uclass_get_device(UCLASS_CLK, 0, &clk));
+ rate = clk_get_rate(clk);
+ ut_asserteq(SANDBOX_CLK_RATE, rate);
+ ut_asserteq(-EINVAL, clk_set_rate(clk, 0));
+ ut_assertok(clk_set_rate(clk, rate * 2));
+ ut_asserteq(SANDBOX_CLK_RATE * 2, clk_get_rate(clk));
+
+ return 0;
+}
+DM_TEST(dm_test_clk_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that peripheral clocks work as expected */
+static int dm_test_clk_periph(struct unit_test_state *uts)
+{
+ struct udevice *clk;
+ ulong rate;
+
+ ut_assertok(uclass_get_device(UCLASS_CLK, 0, &clk));
+ rate = clk_set_periph_rate(clk, PERIPH_ID_COUNT, 123);
+ ut_asserteq(-EINVAL, rate);
+ ut_asserteq(1, IS_ERR_VALUE(rate));
+
+ rate = clk_set_periph_rate(clk, PERIPH_ID_SPI, 123);
+ ut_asserteq(0, rate);
+ ut_asserteq(123, clk_get_periph_rate(clk, PERIPH_ID_SPI));
+
+ rate = clk_set_periph_rate(clk, PERIPH_ID_SPI, 1234);
+ ut_asserteq(123, rate);
+
+ rate = clk_set_periph_rate(clk, PERIPH_ID_I2C, 567);
+
+ rate = clk_set_periph_rate(clk, PERIPH_ID_SPI, 1234);
+ ut_asserteq(1234, rate);
+
+ ut_asserteq(567, clk_get_periph_rate(clk, PERIPH_ID_I2C));
+
+ return 0;
+}
+DM_TEST(dm_test_clk_periph, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);