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author | Ye Li <ye.li@nxp.com> | 2017-03-17 15:38:43 +0800 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2017-03-17 15:51:46 +0800 |
commit | 3b1b0f40893472042d19f8347356546e4e69a5e0 (patch) | |
tree | dd2e314822cd17486744086224d26fe0cf78076b | |
parent | eaa82759c80927e9fb626e3aa5abfb37007624c4 (diff) | |
download | u-boot-imx-3b1b0f40893472042d19f8347356546e4e69a5e0.zip u-boot-imx-3b1b0f40893472042d19f8347356546e4e69a5e0.tar.gz u-boot-imx-3b1b0f40893472042d19f8347356546e4e69a5e0.tar.bz2 |
MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)
-rw-r--r-- | arch/arm/cpu/armv7/mx7ulp/scg.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c index 35d962c..d6ece80 100644 --- a/arch/arm/cpu/armv7/mx7ulp/scg.c +++ b/arch/arm/cpu/armv7/mx7ulp/scg.c @@ -498,7 +498,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->spllnum); denom = readl(&scg1_regs->splldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -525,7 +527,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->apllnum); denom = readl(&scg1_regs->aplldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_USB: reg = readl(&scg1_regs->upllcsr); |