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authorYe Li <ye.li@nxp.com>2016-10-12 15:45:49 +0800
committerYe Li <ye.li@nxp.com>2016-10-12 15:45:49 +0800
commit92946cba62d23e6ace547a90a0debb1916fa0add (patch)
tree5da2474011a0aee68511b52aa7f4d069c82680e9
parentf6c75d019afb2b4a59b10649b95bde8b7723a30b (diff)
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MLK-13330 mx6sll_arm2: Update LPDDR3 script to v2.2
Changes from v1.2 to v2.2: Version 2.2 -Issue a Precharge-All command prior to the MRW Reset command. -setmem /32 0x021B001C = 0x00008050 // [MMDC_MDSCR] precharge all to CS0 -setmem /32 0x021B001C = 0x00008058 // [MMDC_MDSCR] precharge all to CS1 Version 2.1 -Update MMDC PHY Read/Write delay-lines Configuration Register according to calibration results -setmem /32 0x021B0848 = 0x3C3A3C3C // [MMDC_MPRDDLCTL] -setmem /32 0x021B0850 = 0x24293625 // [MMDC_MPWRDLCTL] Version 1.2.1 -Fix a typo. setmem /32 0x020E052C = 0x00000030 -Fix a typo. setmem /32 0x021B0800 = 0xA1390003 File: http://compass.freescale.net/livelink/livelink?func=ll&objId=235701297&objAction=browse&viewType=1 Test: Overnight memtester passed on two i.MX6SLL LPDDR3 ARM2 boards. Signed-off-by: Ye Li <ye.li@nxp.com>
-rw-r--r--board/freescale/mx6sll_arm2/imximage.cfg10
-rw-r--r--board/freescale/mx6sll_arm2/plugin.S11
2 files changed, 14 insertions, 7 deletions
diff --git a/board/freescale/mx6sll_arm2/imximage.cfg b/board/freescale/mx6sll_arm2/imximage.cfg
index c39f9a1..70f2f24 100644
--- a/board/freescale/mx6sll_arm2/imximage.cfg
+++ b/board/freescale/mx6sll_arm2/imximage.cfg
@@ -57,7 +57,7 @@ DATA 4 0x020E0550 0x00080000
DATA 4 0x020E0534 0x00000000
DATA 4 0x020E02AC 0x00000030
DATA 4 0x020E0548 0x00000030
-DATA 4 0x020E0520 0x00000030
+DATA 4 0x020E052C 0x00000030
DATA 4 0x020E0530 0x00020000
DATA 4 0x020E02B0 0x00003030
DATA 4 0x020E02B4 0x00003030
@@ -79,8 +79,8 @@ DATA 4 0x021B001C 0x00008000
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B085c 0x084700C7
DATA 4 0x021B0890 0x00400000
-DATA 4 0x021B0848 0x40404040
-DATA 4 0x021B0850 0x40404040
+DATA 4 0x021B0848 0x3C3A3C3C
+DATA 4 0x021B0850 0x24293625
DATA 4 0x021B081C 0x33333333
DATA 4 0x021B0820 0x33333333
DATA 4 0x021B0824 0x33333333
@@ -106,6 +106,8 @@ DATA 4 0x021B0000 0xC4190000
DATA 4 0x021B083C 0x20000000
+DATA 4 0x021B001C 0x00008050
+DATA 4 0x021B001C 0x00008058
DATA 4 0x021B001C 0x003F8030
DATA 4 0x021B001C 0x003F8038
DATA 4 0x021B001C 0xFF0A8030
@@ -118,7 +120,7 @@ DATA 4 0x021B001C 0x01038030
DATA 4 0x021B001C 0x01038038
DATA 4 0x021B0020 0x00001800
-DATA 4 0x021B0800 0xA1310003
+DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B0004 0x00020052
DATA 4 0x021B0404 0x00011006
DATA 4 0x021B001C 0x00000000
diff --git a/board/freescale/mx6sll_arm2/plugin.S b/board/freescale/mx6sll_arm2/plugin.S
index b3741aa..060631e 100644
--- a/board/freescale/mx6sll_arm2/plugin.S
+++ b/board/freescale/mx6sll_arm2/plugin.S
@@ -16,7 +16,7 @@
ldr r1, =0x00000030
str r1, [r0, #0x2AC]
str r1, [r0, #0x548]
- str r1, [r0, #0x520]
+ str r1, [r0, #0x52C]
ldr r1, =0x00020000
str r1, [r0, #0x530]
ldr r1, =0x00003030
@@ -50,8 +50,9 @@
ldr r1, =0x00400000
str r1, [r0, #0x890]
- ldr r1, =0x40404040
+ ldr r1, =0x3C3A3C3C
str r1, [r0, #0x848]
+ ldr r1, =0x24293625
str r1, [r0, #0x850]
ldr r1, =0x33333333
@@ -94,6 +95,10 @@
ldr r1, =0x20000000
str r1, [r0, #0x83C]
+ ldr r1, =0x00008050
+ str r1, [r0, #0x01C]
+ ldr r1, =0x00008058
+ str r1, [r0, #0x01C]
ldr r1, =0x003F8030
str r1, [r0, #0x01C]
ldr r1, =0x003F8038
@@ -117,7 +122,7 @@
ldr r1, =0x00001800
str r1, [r0, #0x020]
- ldr r1, =0xA1310003
+ ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x004]