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| author | Michal Simek <michal.simek@xilinx.com> | 2015-12-08 11:56:23 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-12-18 13:15:57 +0100 |
| commit | 8647219b5cf3125248b36ad514fae7beb9c78939 (patch) | |
| tree | 16ba0d23a759ea377966915034af4d50fe02f46b | |
| parent | 9cddb4fe0266484aab9babdd2ebe650021644ea9 (diff) | |
| download | u-boot-imx-8647219b5cf3125248b36ad514fae7beb9c78939.zip u-boot-imx-8647219b5cf3125248b36ad514fae7beb9c78939.tar.gz u-boot-imx-8647219b5cf3125248b36ad514fae7beb9c78939.tar.bz2 | |
ARM: zynq: Enable u-boot,dm-pre-reloc for sdhci
Enable u-boot,dm-pre-reloc for sdhci for zc706, zed and zybo.
And create aliases for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/arm/dts/zynq-zc706.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-zed.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-zybo.dts | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index 5088cfe..1ba3a1c 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -18,6 +18,7 @@ i2c0 = &i2c0; serial0 = &uart1; spi0 = &qspi; + mmc0 = &sdhci0; }; memory { @@ -291,6 +292,7 @@ }; &sdhci0 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index 51d67d9..5ec59e2 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -17,6 +17,7 @@ ethernet0 = &gem0; serial0 = &uart1; spi0 = &qspi; + mmc0 = &sdhci0; }; memory { @@ -50,6 +51,7 @@ }; &sdhci0 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts index dcfc00e..199264a 100644 --- a/arch/arm/dts/zynq-zybo.dts +++ b/arch/arm/dts/zynq-zybo.dts @@ -16,6 +16,7 @@ aliases { ethernet0 = &gem0; serial0 = &uart1; + mmc0 = &sdhci0; }; memory { @@ -45,6 +46,7 @@ }; &sdhci0 { + u-boot,dm-pre-reloc; status = "okay"; }; |