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authorSimon Glass <sjg@chromium.org>2015-02-27 22:06:42 -0700
committerSimon Glass <sjg@chromium.org>2015-04-23 09:05:55 -0600
commitf3d46bd658ef4df575ec26c29e472ac858723159 (patch)
treea8c9a5f19d773fceaa5d7530d73d870bb82f28b9
parentb2b0d3e7129d4e59be1a016ad4fb05db87b8c5b4 (diff)
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dm: Init device tree as well as driver model in SPL
If enabled, make sure that the device tree is available in SPL before setting up driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--common/spl/spl.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c
index af1336c..6a02c9e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -151,6 +151,8 @@ static void spl_ram_load_image(void)
void board_init_r(gd_t *dummy1, ulong dummy2)
{
u32 boot_device;
+ int ret;
+
debug(">>spl:board_init_r()\n");
#if defined(CONFIG_SYS_SPL_MALLOC_START)
@@ -161,9 +163,21 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
gd->malloc_ptr = 0;
#endif
-#ifdef CONFIG_SPL_DM
- dm_init_and_scan(true);
-#endif
+ if (IS_ENABLED(CONFIG_OF_CONTROL) &&
+ !IS_ENABLED(CONFIG_SPL_DISABLE_OF_CONTROL)) {
+ ret = fdtdec_setup();
+ if (ret) {
+ debug("fdtdec_setup() returned error %d\n", ret);
+ hang();
+ }
+ }
+ if (IS_ENABLED(CONFIG_SPL_DM)) {
+ ret = dm_init_and_scan(true);
+ if (ret) {
+ debug("dm_init_and_scan() returned error %d\n", ret);
+ hang();
+ }
+ }
#ifndef CONFIG_PPC
/*