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| author | Tom Rini <trini@konsulko.com> | 2015-04-02 16:01:33 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-04-07 08:41:10 -0400 |
| commit | e049b772ae21e6698b65ebb3bc3afc61c8b13f39 (patch) | |
| tree | d2dcf2e304d0ac3852e16190bb30f63668c93013 | |
| parent | e37f1eb45c9f7da7e3463a27f2c2020fc35604b7 (diff) | |
| download | u-boot-imx-e049b772ae21e6698b65ebb3bc3afc61c8b13f39.zip u-boot-imx-e049b772ae21e6698b65ebb3bc3afc61c8b13f39.tar.gz u-boot-imx-e049b772ae21e6698b65ebb3bc3afc61c8b13f39.tar.bz2 | |
am33xx/ddr.c: Fix regression on DDR2 platforms
Back in fc46bae a "clean up" was introduced that intended to reconcile
some of the AM335x codepaths based on how AM43xx operates.
Unfortunately this introduced a regression on the DDR2 platforms. This
was un-noticed on DDR3 (everything except for Beaglebone White) as we
had already populated sdram_config correctly in sequence. This change
brings us back to the older behavior and is fine on all platforms.
Tested on Beaglebone White, Beaglebone Black and AM335x GP EVM
Reported-by: Matt Ranostay <mranostay@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/ddr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index 85cceae..f5b16b4 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -164,9 +164,9 @@ void config_sdram(const struct emif_regs *regs, int nr) writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl); writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw); } - writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config); writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl); writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw); + writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config); } /** |