diff options
author | Ye.Li <B37916@freescale.com> | 2014-06-12 19:34:18 +0800 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2016-03-25 13:39:01 +0800 |
commit | d50b53f138dd3b4c463c80ac8e14f41ac0fdd415 (patch) | |
tree | d5b9d2a9f8cfedef553a550219b714b570d03ae7 | |
parent | dc767fb7d5c155f2a6ef01c4dee808b9c1944fc2 (diff) | |
download | u-boot-imx-d50b53f138dd3b4c463c80ac8e14f41ac0fdd415.zip u-boot-imx-d50b53f138dd3b4c463c80ac8e14f41ac0fdd415.tar.gz u-boot-imx-d50b53f138dd3b4c463c80ac8e14f41ac0fdd415.tar.bz2 |
ENGR00315894-77 mx6 soc: Add vadc power up/down function
Add vadc power up/down function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 96d990ef754a879f6ca9da4adf6e0be3d21cdc51)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 01b88201aa86bef26a4254ac43aff90e99fd2c06)
-rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 46 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/imx-common/sys_proto.h | 3 |
3 files changed, 49 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 75dea187..871716a 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -311,6 +311,52 @@ static void set_preclk_from_osc(void) } #endif +#ifdef CONFIG_MX6SX +void vadc_power_up(void) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + u32 val; + + /* csi0 */ + val = readl(&iomux->gpr[5]); + val &= ~IMX6SX_GPR5_CSI1_MUX_CTRL_MASK, + val |= IMX6SX_GPR5_CSI1_MUX_CTRL_CVD; + writel(val, &iomux->gpr[5]); + + /* Power on vadc analog + * Power down vadc ext power */ + val = readl(GPC_BASE_ADDR + 0); + val &= ~0x60000; + writel(val, GPC_BASE_ADDR + 0); + + /* software reset afe */ + val = readl(&iomux->gpr[1]); + writel(val | 0x80000, &iomux->gpr[1]); + + udelay(10*1000); + + /* Release reset bit */ + writel(val & ~0x80000, &iomux->gpr[1]); + + /* Power on vadc ext power */ + val = readl(GPC_BASE_ADDR + 0); + val |= 0x40000; + writel(val, GPC_BASE_ADDR + 0); +} + +void vadc_power_down(void) +{ + u32 val; + + /* Power down vadc ext power + * Power off vadc analog */ + val = readl(GPC_BASE_ADDR + 0); + val &= ~0x40000; + val |= 0x20000; + writel(val, GPC_BASE_ADDR + 0); +} +#endif + int arch_cpu_init(void) { init_aips(); diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 75b2502..08a2183 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -689,13 +689,11 @@ struct gpc { #define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (IOMUXC_GPR2_MODE_ENABLED_DI0<<IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) #define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI1 (IOMUXC_GPR2_MODE_ENABLED_DI1<<IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) -#ifdef CONFIG_MX6SX #define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_CVD (0x1 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_VDAC_TO_CSI (0x2 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_GND (0x3 << 4) -#endif /* ECSPI registers */ struct cspi_regs { diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index ca88569..189765b 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -57,4 +57,7 @@ int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout); int mmc_get_env_dev(void); void board_late_mmc_env_init(void); + +void vadc_power_up(void); +void vadc_power_down(void); #endif |