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| author | Haibo Chen <haibo.chen@nxp.com> | 2016-10-26 17:04:40 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2016-11-16 16:59:36 +0800 |
| commit | cc7d23dcc35f5ed11a8247ae5199aecc1bc78f38 (patch) | |
| tree | fc840b081fe6a6a5a576a235a7e49fb4ff7a0404 | |
| parent | 756f99a428177a8da5f370bd70b4c90287a2da0c (diff) | |
| download | u-boot-imx-cc7d23dcc35f5ed11a8247ae5199aecc1bc78f38.zip u-boot-imx-cc7d23dcc35f5ed11a8247ae5199aecc1bc78f38.tar.gz u-boot-imx-cc7d23dcc35f5ed11a8247ae5199aecc1bc78f38.tar.bz2 | |
MLK-13405-3 mx6sll-evk: change the eMMC reset pad to 1.8v
eMMC is connected fixed to 1.8v, so need to set the LVE of pad
sd2_rst. Also need to set the VSELECT to change all the eMMC pad
(cmd, clk, data) I/O voltage to 1.8v. Otherwise, the current leak
will pull up the VCCQ from 1.8v to 2.6v, which will impact SD1 and
SD3 voltage switch.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 0df1d6537bef13c1846c6762e78938a304e083b0)
| -rw-r--r-- | board/freescale/mx6sllevk/mx6sllevk.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/board/freescale/mx6sllevk/mx6sllevk.c b/board/freescale/mx6sllevk/mx6sllevk.c index 2e877c1..cfcb4bc 100644 --- a/board/freescale/mx6sllevk/mx6sllevk.c +++ b/board/freescale/mx6sllevk/mx6sllevk.c @@ -145,7 +145,7 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { /* DQS */ MX6_PAD_GPIO4_IO21__SD2_STROBE | MUX_PAD_CTRL(NO_PAD_CTRL), /* RST_B */ - MX6_PAD_SD2_RESET__GPIO4_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD2_RESET__GPIO4_IO27 | MUX_PAD_CTRL(USDHC_PAD_CTRL | PAD_CTL_LVE), }; /* Wifi SD */ @@ -210,7 +210,7 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { - int i; + int i, ret; /* * According to the board_mmc_init() the following map is done: @@ -230,6 +230,10 @@ int board_mmc_init(bd_t *bis) case 1: imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + /* eMMC connect to 1.8v, so need to set eMMC I/O voltage to 1.8v */ + ret = readl(usdhc_cfg[1].esdhc_base + 0xc0); /* vend_spec */ + ret |= 0x2; + writel(ret, (usdhc_cfg[1].esdhc_base + 0xc0)); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); gpio_direction_output(USDHC2_PWR_GPIO, 1); break; |