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authorYe Li <ye.li@nxp.com>2016-10-10 10:18:42 +0800
committerRobby Cai <robby.cai@nxp.com>2016-11-16 16:58:10 +0800
commit8b0ab2cabe568ada286c6984ec55d3aa1f1942de (patch)
treeb514d8f3d44e2172b22a130c3165a4b37eca930e
parent8bd6e3c556278a172683cb533a244a888714a710 (diff)
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MLK-13307-13 OCOTP: Update OCOTP driver to support i.MX6SLL
The i.MX6SLL reuses the i.MX6ULL fuse, and has same fuse bank map. Add the i.MX6SLL support to OCOTP driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 45e47b225911cda368519953d834aca3976dc70d)
-rw-r--r--drivers/misc/mxc_ocotp.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 2ab7898..8cfaa06 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -62,7 +62,7 @@
#define FUSE_BANK_SIZE 0x80
#ifdef CONFIG_MX6SL
#define FUSE_BANKS 8
-#elif defined CONFIG_MX6ULL
+#elif defined(CONFIG_MX6ULL) || defined(CONFIG_MX6SLL)
#define FUSE_BANKS 9
#else
#define FUSE_BANKS 16
@@ -78,7 +78,8 @@
/*
* There is a hole in shadow registers address map of size 0x100
- * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX, iMX6UL and iMX6ULL.
+ * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX, iMX6UL,
+ * iMX6ULL and iMX6SLL.
* Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
* we should account for this hole in address space.
*
@@ -99,8 +100,9 @@ u32 fuse_bank_physical(int index)
if (is_cpu_type(MXC_CPU_MX6SL)) {
phy_index = index;
- } else if (is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6ULL)) {
- if (is_cpu_type(MXC_CPU_MX6ULL) && index == 8)
+ } else if (is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6ULL) ||
+ is_cpu_type(MXC_CPU_MX6SLL)) {
+ if ((is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SLL)) && index == 8)
index = 7;
if (index >= 6)
@@ -120,7 +122,7 @@ u32 fuse_bank_physical(int index)
u32 fuse_word_physical(u32 bank, u32 word_index)
{
- if (is_cpu_type(MXC_CPU_MX6ULL)) {
+ if (is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SLL)) {
if (bank == 8)
word_index = word_index + 4;
}
@@ -163,10 +165,10 @@ static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,
return -EINVAL;
}
- if (is_cpu_type(MXC_CPU_MX6ULL)) {
+ if (is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SLL)) {
if ((bank == 7 || bank == 8) &&
word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) {
- printf("mxc_ocotp %s(): Invalid argument on 6ULL\n", caller);
+ printf("mxc_ocotp %s(): Invalid argument\n", caller);
return -EINVAL;
}
}
@@ -270,7 +272,7 @@ static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,
#else
u32 addr;
/* Bank 7 and Bank 8 only supports 4 words each */
- if ((is_cpu_type(MXC_CPU_MX6ULL)) && (bank > 7)) {
+ if ((is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SLL)) && (bank > 7)) {
bank = bank - 1;
word += 4;
}