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author | Tom Warren <twarren@nvidia.com> | 2013-03-18 14:47:55 -0700 |
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committer | Tom Warren <twarren@nvidia.com> | 2013-03-25 09:56:07 -0700 |
commit | 2a04a317911a550e55c2943d59063b621ea5f4ee (patch) | |
tree | 719e592a8d25d2e8100cc4fb4a2740a1292b9891 | |
parent | e9cd20654c1ce3112cac0f369640a74f694618a3 (diff) | |
download | u-boot-imx-2a04a317911a550e55c2943d59063b621ea5f4ee.zip u-boot-imx-2a04a317911a550e55c2943d59063b621ea5f4ee.tar.gz u-boot-imx-2a04a317911a550e55c2943d59063b621ea5f4ee.tar.bz2 |
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r-- | arch/arm/include/asm/arch-tegra114/gp_padctrl.h | 6 | ||||
-rw-r--r-- | board/nvidia/dalmore/dalmore.c | 4 | ||||
-rw-r--r-- | board/nvidia/dalmore/pinmux-config-dalmore.h | 6 |
3 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra114/gp_padctrl.h b/arch/arm/include/asm/arch-tegra114/gp_padctrl.h index 1ef1a14..41ce677 100644 --- a/arch/arm/include/asm/arch-tegra114/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra114/gp_padctrl.h @@ -74,4 +74,10 @@ struct apb_misc_gp_ctlr { u32 aocfg0; /* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL */ }; +/* SDMMC1/3 settings from section 27.5 of T114 TRM */ +#define SDIOCFG_DRVUP_SLWF 0 +#define SDIOCFG_DRVDN_SLWR 0 +#define SDIOCFG_DRVUP 0x24 +#define SDIOCFG_DRVDN 0x14 + #endif /* _TEGRA114_GP_PADCTRL_H_ */ diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index 2020a5f..7449b5b 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -16,6 +16,7 @@ #include <common.h> #include <asm/arch/pinmux.h> +#include <asm/arch/gp_padctrl.h> #include "pinmux-config-dalmore.h" /* @@ -32,4 +33,7 @@ void pinmux_init(void) pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); + + /* Initialize any non-default pad configs (APB_MISC_GP regs) */ + padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl)); } diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h index 3ef6f4e..8c05a15 100644 --- a/board/nvidia/dalmore/pinmux-config-dalmore.h +++ b/board/nvidia/dalmore/pinmux-config-dalmore.h @@ -361,4 +361,10 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = { DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT), }; + +static struct padctrl_config dalmore_padctrl[] = { + /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ + DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \ + SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE), +}; #endif /* PINMUX_CONFIG_COMMON_H */ |