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| author | Ye Li <ye.li@nxp.com> | 2016-11-08 10:32:58 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2016-11-16 17:00:15 +0800 |
| commit | 23b28848d6950420fbd0664729bde6dacc547c3b (patch) | |
| tree | 2cf593bd03f3bced2dcfcf54260ee70163daed22 | |
| parent | 09ef94ef98520590195f956180297fdaff3df8dc (diff) | |
| download | u-boot-imx-23b28848d6950420fbd0664729bde6dacc547c3b.zip u-boot-imx-23b28848d6950420fbd0664729bde6dacc547c3b.tar.gz u-boot-imx-23b28848d6950420fbd0664729bde6dacc547c3b.tar.bz2 | |
MLK-13440-1: fsl_usdhc: Add configuration parameter for using fixed 1.8V I/O
When using eMMC with 1.8V I/O, we have to set the VSELECT bit at this USDHC controller
setup and init. The CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT has problem that it will
apply to all USDHC controllers and it only set the 1.8V at init phase. So if user does not
select to the eMMC device, the voltage on the I/O pins are not correct.
This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg structure, so each controller
can have different settings. The default value is 0 for 3.3V, which is compatible with current
codes. When setting this value to 1, at USDHC setup and init phase the driver will set the
VSELECT bit.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit ebd872f491af27c38a0698d226222ea5093c563c)
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 5 | ||||
| -rw-r--r-- | include/fsl_esdhc.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index d41a8a7..6bf061b 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -644,6 +644,9 @@ static int esdhc_init(struct mmc *mmc) esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); #endif + if (cfg->vs18_enable) + esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); + return 0; } @@ -712,6 +715,8 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); #endif + if (cfg->vs18_enable) + esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); memset(&cfg->cfg, 0, sizeof(cfg->cfg)); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 539064c..55cfac1 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -182,6 +182,7 @@ struct fsl_esdhc_cfg { u32 sdhc_clk; u8 max_bus_width; u8 wp_enable; + u8 vs18_enable; /*default use 1.8v if this var is not 0*/ struct mmc_config cfg; }; |