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authorSimon Glass <sjg@chromium.org>2013-06-11 11:14:52 -0700
committerTom Rini <trini@ti.com>2013-06-26 10:18:56 -0400
commitd8819f94d58d8c94c619431bc34232a52b2d9a6b (patch)
treee23d626a39c88355177444a25799d0e320279d3f
parent5b7dcf311236f45ef9f2b1d6a72080bd3fe99ee5 (diff)
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x86: Support tracing function
Some changes are needed to x86 timer functions to support tracing. Add these so that the feature works correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/include/asm/global_data.h2
-rw-r--r--arch/x86/include/asm/msr.h3
-rw-r--r--arch/x86/include/asm/u-boot-x86.h2
-rw-r--r--arch/x86/lib/gcc.c4
-rw-r--r--arch/x86/lib/tsc_timer.c6
5 files changed, 10 insertions, 7 deletions
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 4fdb080..9a2056a 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -40,7 +40,7 @@ struct arch_global_data {
#include <asm-generic/global_data.h>
#ifndef __ASSEMBLY__
-static inline gd_t *get_fs_gd_ptr(void)
+static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
{
gd_t *gd_ptr;
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 6030633..b459a63 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -85,7 +85,8 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
#define EAX_EDX_RET(val, low, high) "=A" (val)
#endif
-static inline unsigned long long native_read_msr(unsigned int msr)
+static inline __attribute__((no_instrument_function))
+ unsigned long long native_read_msr(unsigned int msr)
{
DECLARE_ARGS(val, low, high);
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index 22e0934..709dc84 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -64,7 +64,7 @@ void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void board_init_f_r(void) __attribute__ ((noreturn));
/* Read the time stamp counter */
-static inline uint64_t rdtsc(void)
+static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
{
uint32_t high, low;
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
diff --git a/arch/x86/lib/gcc.c b/arch/x86/lib/gcc.c
index 4043431..497ad75 100644
--- a/arch/x86/lib/gcc.c
+++ b/arch/x86/lib/gcc.c
@@ -28,7 +28,9 @@
#define WRAP_LIBGCC_CALL(type, name) \
type __normal_##name(type a, type b) __attribute__((regparm(0))); \
type __wrap_##name(type a, type b); \
- type __wrap_##name(type a, type b) { return __normal_##name(a, b); }
+ type __attribute__((no_instrument_function)) \
+ __wrap_##name(type a, type b) \
+ { return __normal_##name(a, b); }
WRAP_LIBGCC_CALL(long long, __divdi3)
WRAP_LIBGCC_CALL(unsigned long long, __udivdi3)
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c
index c509801..0688973 100644
--- a/arch/x86/lib/tsc_timer.c
+++ b/arch/x86/lib/tsc_timer.c
@@ -37,7 +37,7 @@ void timer_set_base(u64 base)
* restart. This yields a free running counter guaranteed to take almost 6
* years to wrap around even at 100GHz clock rate.
*/
-u64 get_ticks(void)
+u64 __attribute__((no_instrument_function)) get_ticks(void)
{
u64 now_tick = rdtsc();
@@ -50,7 +50,7 @@ u64 get_ticks(void)
#define PLATFORM_INFO_MSR 0xce
/* Get the speed of the TSC timer in MHz */
-unsigned long get_tbclk_mhz(void)
+unsigned __attribute__((no_instrument_function)) long get_tbclk_mhz(void)
{
u32 ratio;
u64 platform_info = native_read_msr(PLATFORM_INFO_MSR);
@@ -75,7 +75,7 @@ ulong get_timer(ulong base)
return get_ms_timer() - base;
}
-ulong timer_get_us(void)
+ulong __attribute__((no_instrument_function)) timer_get_us(void)
{
return get_ticks() / get_tbclk_mhz();
}