MA-9192 pico-imx7d, add build configuration for DDR 512MB

commit fb36b60c46392f3593f0fa15eaedfbf7b27b0e20
Author: Richard Hu <richard.hu@technexion.com>
Date:   Tue Dec 20 16:59:01 2016 +0800

pico-imx7: add build configuration for DDR 512MB

There are two different DDR types for pico-imx7: 1GB and 512MB.

Change-Id: Ifa1bdaeb7dcd623fc93514760091b82d59f26437
Signed-off-by: Chen Guoyin <guoyin.chen@nxp.com>

6 files changed, 176 insertions, 4 deletions

diff --git a/board/technexion/pico-imx7d/imximage_512mb.cfg b/board/technexion/pico-imx7d/imximage_512mb.cfg
new file mode 100644
index 0000000..e27513d
--- /dev/null
+++ b/board/technexion/pico-imx7d/imximage_512mb.cfg
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *               2015-2016 Toradex AG
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+#define __ASSEMBLY__
+#include <config.h>
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+#if 0
+BOOT_FROM	nand
+#else
+BOOT_FROM	sd
+#endif
+
+#ifdef CONFIG_USE_PLUGIN
+/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
+PLUGIN	board/toradex/colibri_imx7/plugin.bin 0x00910000
+#else
+
+#ifdef CONFIG_SECURE_BOOT
+CSF CONFIG_CSF_SIZE
+#endif
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type           Address        Value
+ *
+ * where:
+ *	Addr-type register length (1,2 or 4 bytes)
+ *	Address	  absolute address of the register
+ *	value	  value to be stored in the register
+ */
+
+/* IOMUXC_GPR_GPR1 */
+DATA 4 0x30340004 0x4F400005
+
+/* DDR3L */
+/* assuming MEMC_FREQ_RATIO = 2 */
+/* SRC_DDRC_RCR */
+DATA 4 0x30391000 0x00000002
+/* DDRC_MSTR */
+DATA 4 0x307a0000 0x01040001
+/* DDRC_RFSHTMG */
+DATA 4 0x307a0064 0x00400046
+/* DDRC_MP_PCTRL_0 */
+DATA 4 0x307a0490 0x00000001
+/* DDRC_INIT0 */
+DATA 4 0x307a00d0 0x00020083
+/* DDRC_INIT1 */
+DATA 4 0x307a00d4 0x00690000
+/* DDRC_INIT3 MR0/MR1 */
+DATA 4 0x307a00dc 0x09300004
+/* DDRC_INIT4 MR2/MR3 */
+DATA 4 0x307a00e0 0x04080000
+/* DDRC_INIT5 */
+DATA 4 0x307a00e4 0x00100004
+/* DDRC_RANKCTL */
+DATA 4 0x307a00f4 0x0000033f
+/* DDRC_DRAMTMG0 */
+DATA 4 0x307a0100 0x09081109
+/* DDRC_DRAMTMG1 */
+DATA 4 0x307a0104 0x0007020D
+/* DDRC_DRAMTMG2 */
+DATA 4 0x307a0108 0x03040407
+/* DDRC_DRAMTMG3 */
+DATA 4 0x307a010c 0x00002006
+/* DDRC_DRAMTMG4 */
+DATA 4 0x307a0110 0x04020205
+/* DDRC_DRAMTMG5 */
+DATA 4 0x307a0114 0x03030202
+/* DDRC_DRAMTMG8 */
+DATA 4 0x307a0120 0x00000803
+/* DDRC_ZQCTL0 */
+DATA 4 0x307a0180 0x00800020
+/* DDRC_DFITMG0 */
+DATA 4 0x307a0190 0x02098204
+/* DDRC_DFITMG1 */
+DATA 4 0x307a0194 0x00030303
+/* DDRC_DFIUPD0 */
+DATA 4 0x307a01a0 0x80400003
+/* DDRC_DFIUPD1 */
+DATA 4 0x307a01a4 0x00100020
+/* DDRC_DFIUPD2 */
+DATA 4 0x307a01a8 0x80100004
+/* DDRC_ADDRMAP0 */
+DATA 4 0x307a0200 0x00000015
+/* DDRC_ADDRMAP1 */
+DATA 4 0x307a0204 0x00161616
+/* DDRC_ADDRMAP4 */
+DATA 4 0x307A0210 0x00000F0F
+/* DDRC_ADDRMAP5 */
+DATA 4 0x307a0214 0x04040404
+/* DDRC_ADDRMAP6 */
+DATA 4 0x307a0218 0x0F0F0404
+/* DDRC_ODTCFG */
+DATA 4 0x307a0240 0x06000604
+/* DDRC_ODTMAP */
+DATA 4 0x307a0244 0x00000001
+/* SRC_DDRC_RCR */
+DATA 4 0x30391000 0x00000000
+/* DDR_PHY_PHY_CON0 */
+DATA 4 0x30790000 0x17420f40
+/* DDR_PHY_PHY_CON1 */
+DATA 4 0x30790004 0x10210100
+/* DDR_PHY_PHY_CON4 */
+DATA 4 0x30790010 0x00060807
+/* DDR_PHY_MDLL_CON0 */
+DATA 4 0x307900b0 0x1010007e
+/* DDR_PHY_DRVDS_CON0 */
+DATA 4 0x3079009c 0x00000d6e
+
+/* DDR_PHY_OFFSET_RD_CON0 */
+DATA 4 0x30790020 0x08080808
+/* DDR_PHY_OFFSET_WR_CON0 */
+DATA 4 0x30790030 0x08080808
+/* DDR_PHY_CMD_SDLL_CON0 */
+DATA 4 0x30790050 0x01000010
+DATA 4 0x30790050 0x00000010
+
+/* DDR_PHY_ZQ_CON0 */
+DATA 4 0x307900c0 0x0e407304
+DATA 4 0x307900c0 0x0e447304
+DATA 4 0x307900c0 0x0e447306
+/* DDR_PHY_ZQ_CON1 */
+CHECK_BITS_SET 4 0x307900c4 0x1
+/* DDR_PHY_ZQ_CON0 */
+DATA 4 0x307900c0 0x0e447304
+DATA 4 0x307900c0 0x0e407304
+
+/* CCM_CCGRn */
+DATA 4 0x30384130 0x00000000
+/* IOMUXC_GPR_GPR8 */
+DATA 4 0x30340020 0x00000178
+/* CCM_CCGRn */
+DATA 4 0x30384130 0x00000002
+/* DDR_PHY_LP_CON0 */
+DATA 4 0x30790018 0x0000000f
+
+/* DDRC_STAT */
+CHECK_BITS_SET 4 0x307a0004 0x1
+
+#endif
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index 0f6b2e1..64f2a81 100755
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -124,7 +124,7 @@ struct i2c_pads_info i2c_pad_info4 = {
 
 int dram_init(void)
 {
-	gd->ram_size = PHYS_SDRAM_SIZE;
+	gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
 
 	return 0;
 }
diff --git a/configs/pico-imx7d_ddr_1gb_defconfig b/configs/pico-imx7d_ddr_1gb_defconfig
new file mode 100644
index 0000000..0cbf19c
--- /dev/null
+++ b/configs/pico-imx7d_ddr_1gb_defconfig
@@ -0,0 +1,7 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx7d/imximage.cfg,MX7D,DDR_MB=1024"
+CONFIG_ARM=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_MALLOC_F_LEN=0x400
+CONFIG_DM=y
+CONFIG_DM_THERMAL=y
diff --git a/configs/pico-imx7d_ddr_512mb_defconfig b/configs/pico-imx7d_ddr_512mb_defconfig
new file mode 100644
index 0000000..09b774d
--- /dev/null
+++ b/configs/pico-imx7d_ddr_512mb_defconfig
@@ -0,0 +1,7 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx7d/imximage_512mb.cfg,MX7D,DDR_MB=512"
+CONFIG_ARM=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_MALLOC_F_LEN=0x400
+CONFIG_DM=y
+CONFIG_DM_THERMAL=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index 26aecde..9cd5f6e 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -1,4 +1,4 @@
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx7d/imximage.cfg,MX7D,ANDROID_SUPPORT,BRILLO_SUPPORT,EFI_PARTITION,AVB_SUPPORT"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx7d/imximage_512mb.cfg,MX7D,,DDR_MB=512,ANDROID_SUPPORT,BRILLO_SUPPORT,EFI_PARTITION,AVB_SUPPORT,SYSTEM_RAMDISK_SUPPORT,DDR_MB=512"
 CONFIG_ARM=y
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SYS_MALLOC_F=y
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index ba41d0b..ed53a1f 100755
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -75,8 +75,6 @@
 #define CONFIG_DOS_PARTITION
 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
 
-#define PHYS_SDRAM_SIZE			SZ_1G
-
 #ifdef CONFIG_AVB_SUPPORT
 #define CONFIG_PARTITION_UUIDS
 #endif