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author | Shaveta Leekha <shaveta@freescale.com> | 2014-11-12 14:23:26 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2014-12-05 08:06:12 -0800 |
commit | f7c28aa7cea43286e3f6af1bc3f89e4a2cb261b2 (patch) | |
tree | 242c81c3a317bc29f7ad40af647cca60dde4cb05 | |
parent | 2aea661810396371f8aa5b846c40063a04b92dc8 (diff) | |
download | u-boot-imx-f7c28aa7cea43286e3f6af1bc3f89e4a2cb261b2.zip u-boot-imx-f7c28aa7cea43286e3f6af1bc3f89e4a2cb261b2.tar.gz u-boot-imx-f7c28aa7cea43286e3f6af1bc3f89e4a2cb261b2.tar.bz2 |
powerpc/b4860: Enable law creation of MAPLE
B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation
for them only. Remove static LAW creation for MAPLE.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r-- | board/freescale/b4860qds/b4860qds.c | 8 | ||||
-rw-r--r-- | board/freescale/b4860qds/law.c | 3 |
2 files changed, 8 insertions, 3 deletions
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index bed8f56..9f10cee 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -915,6 +915,14 @@ int board_early_init_r(void) const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; int flash_esel = find_tlb_idx((void *)flashbase, 1); int ret; + u32 svr = SVR_SOC_VER(get_svr()); + + /* Create law for MAPLE only for personalities having MAPLE */ + if ((svr == SVR_B4860) || (svr == SVR_B4440) || + (svr == SVR_B4420) || (svr == SVR_B4220)) { + set_next_law(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, + LAW_TRGT_IF_MAPLE); + } /* * Remap Boot flash + PROMJET region to caching-inhibited diff --git a/board/freescale/b4860qds/law.c b/board/freescale/b4860qds/law.c index 5b327cc..047c3cb 100644 --- a/board/freescale/b4860qds/law.c +++ b/board/freescale/b4860qds/law.c @@ -17,9 +17,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), #endif SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), -#ifdef CONFIG_SYS_MAPLE_MEM_PHYS - SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE), -#endif #ifdef CONFIG_SYS_DCSRBAR_PHYS /* Limit DCSR to 32M to access NPC Trace Buffer */ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), |