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authorMarek Vasut <marex@denx.de>2013-01-22 15:01:01 +0000
committerStefano Babic <sbabic@denx.de>2013-01-28 11:43:01 +0100
commitf3801e2b9bd5b86b5d43d10795ebc56cf4d785fa (patch)
tree2c67019ade6fbe1e65ca71c9b5c0095b69c16b23
parent0e5c05efb4c6ff91c556eff347d023463a96503b (diff)
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mxs: ssp: Add SSP registers map for MX23
The MX23 SSP register layout differs from MX28 in certain bits, adjust the register layout accordingly. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/include/asm/arch-mxs/regs-ssp.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index b97ac35..9b30f56 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -28,6 +28,28 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
+#if defined(CONFIG_MX23)
+struct mxs_ssp_regs {
+ mxs_reg_32(hw_ssp_ctrl0)
+ mxs_reg_32(hw_ssp_cmd0)
+ mxs_reg_32(hw_ssp_cmd1)
+ mxs_reg_32(hw_ssp_compref)
+ mxs_reg_32(hw_ssp_compmask)
+ mxs_reg_32(hw_ssp_timing)
+ mxs_reg_32(hw_ssp_ctrl1)
+ mxs_reg_32(hw_ssp_data)
+ mxs_reg_32(hw_ssp_sdresp0)
+ mxs_reg_32(hw_ssp_sdresp1)
+ mxs_reg_32(hw_ssp_sdresp2)
+ mxs_reg_32(hw_ssp_sdresp3)
+ mxs_reg_32(hw_ssp_status)
+
+ uint32_t reserved1[12];
+
+ mxs_reg_32(hw_ssp_debug)
+ mxs_reg_32(hw_ssp_version)
+};
+#elif defined(CONFIG_MX28)
struct mxs_ssp_regs {
mxs_reg_32(hw_ssp_ctrl0)
mxs_reg_32(hw_ssp_cmd0)
@@ -50,6 +72,7 @@ struct mxs_ssp_regs {
mxs_reg_32(hw_ssp_debug)
mxs_reg_32(hw_ssp_version)
};
+#endif
static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
{
@@ -90,6 +113,11 @@ static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
#define SSP_CTRL0_GET_RESP (1 << 17)
#define SSP_CTRL0_ENABLE (1 << 16)
+#ifdef CONFIG_MX23
+#define SSP_CTRL0_XFER_COUNT_OFFSET 0
+#define SSP_CTRL0_XFER_COUNT_MASK 0xffff
+#endif
+
#define SSP_CMD0_SOFT_TERMINATE (1 << 26)
#define SSP_CMD0_DBL_DATA_RATE_EN (1 << 25)
#define SSP_CMD0_PRIM_BOOT_OP_EN (1 << 24)
@@ -97,6 +125,12 @@ static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
#define SSP_CMD0_SLOW_CLKING_EN (1 << 22)
#define SSP_CMD0_CONT_CLKING_EN (1 << 21)
#define SSP_CMD0_APPEND_8CYC (1 << 20)
+#if defined(CONFIG_MX23)
+#define SSP_CMD0_BLOCK_SIZE_MASK (0xf << 16)
+#define SSP_CMD0_BLOCK_SIZE_OFFSET 16
+#define SSP_CMD0_BLOCK_COUNT_MASK (0xff << 8)
+#define SSP_CMD0_BLOCK_COUNT_OFFSET 8
+#endif
#define SSP_CMD0_CMD_MASK 0xff
#define SSP_CMD0_CMD_OFFSET 0
#define SSP_CMD0_CMD_MMC_GO_IDLE_STATE 0x00
@@ -170,6 +204,7 @@ static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
#define SSP_CMD1_CMD_ARG_MASK 0xffffffff
#define SSP_CMD1_CMD_ARG_OFFSET 0
+#if defined(CONFIG_MX28)
#define SSP_XFER_SIZE_XFER_COUNT_MASK 0xffffffff
#define SSP_XFER_SIZE_XFER_COUNT_OFFSET 0
@@ -177,6 +212,7 @@ static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
#define SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET 4
#define SSP_BLOCK_SIZE_BLOCK_SIZE_MASK 0xf
#define SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET 0
+#endif
#define SSP_COMPREF_REFERENCE_MASK 0xffffffff
#define SSP_COMPREF_REFERENCE_OFFSET 0