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| author | Vincent Stehlé <v-stehle@ti.com> | 2013-03-04 20:04:43 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-03-28 09:06:43 +0100 |
| commit | dfa41387155daed35cc6b294b2390641aa887a1d (patch) | |
| tree | 029523ff74bd8d18d220782ca495e0f97d2e7b32 | |
| parent | ebd749da69f423a26222d2cdde9a77007fd8b4b7 (diff) | |
| download | u-boot-imx-dfa41387155daed35cc6b294b2390641aa887a1d.zip u-boot-imx-dfa41387155daed35cc6b294b2390641aa887a1d.tar.gz u-boot-imx-dfa41387155daed35cc6b294b2390641aa887a1d.tar.bz2 | |
ARM: cache: declare set_section_dcache
We declare the set_section_dcache function globally in the cache header, for
later use by e.g. machine specific code.
Signed-off-by: Vincent Stehlé <v-stehle <at> ti.com>
Cc: Tom Rini <trini <at> ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| -rw-r--r-- | arch/arm/include/asm/cache.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index eef6a5a..416d2c8 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -41,6 +41,7 @@ static inline void invalidate_l2_cache(void) void l2_cache_enable(void); void l2_cache_disable(void); +void set_section_dcache(int section, enum dcache_option option); /* * The current upper bound for ARM L1 data cache line sizes is 64 bytes. We |