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| author | Anson Huang <Anson.Huang@nxp.com> | 2016-03-24 17:41:08 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2016-03-24 17:42:03 +0800 |
| commit | d7d7c4312b71dd3879fa8640b23f6a5bac30e303 (patch) | |
| tree | 418257715b76297c15df2897fec1a72729caef41 | |
| parent | 7c7dd84b4b5cc90022fdd342d8714925af6ebb4f (diff) | |
| download | u-boot-imx-d7d7c4312b71dd3879fa8640b23f6a5bac30e303.zip u-boot-imx-d7d7c4312b71dd3879fa8640b23f6a5bac30e303.tar.gz u-boot-imx-d7d7c4312b71dd3879fa8640b23f6a5bac30e303.tar.bz2 | |
MLK-12576 imx: imx6ul: disable POR_B internal pull uprel_imx_4.1.15_1.1.1_patchrel_imx_4.1.15_1.1.0_ga
From TO1.1, SNVS adds internal pull up control for POR_B,
the register filed is GPBIT[1:0], after system boot up,
it can be set to 2b'01 to disable internal pull up.
It can save about 30uA power in SNVS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 4689924..c725fca 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -477,6 +477,15 @@ int arch_cpu_init(void) * drain 100K (0x0000b8a0). */ writel(0x0000b8a0, IOMUXC_BASE_ADDR + 0x29c); + } else { + /* + * From TO1.1, SNVS adds internal pull up control for POR_B, + * the register filed is GPBIT[1:0], after system boot up, + * it can be set to 2b'01 to disable internal pull up. + * It can save about 30uA power in SNVS mode. + */ + writel((readl(SNVS_LP_BASE_ADDR + 0x10) & (~0x1400)) | 0x400, + SNVS_LP_BASE_ADDR + 0x10); } #endif |