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authorstroese <stroese>2003-02-17 16:06:06 +0000
committerstroese <stroese>2003-02-17 16:06:06 +0000
commitd7787c6e57f602d1f8c17c94886b81ee2ae229c2 (patch)
tree6d39ab462ebbcc2271b2d05385ce1ab0dc0ee010
parentad10dd9aaf573fefe1cbd9d446a24f07f8b87428 (diff)
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Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).
-rw-r--r--CHANGELOG3
-rw-r--r--cpu/ppc4xx/serial.c2
2 files changed, 4 insertions, 1 deletions
diff --git a/CHANGELOG b/CHANGELOG
index d103759..d22ce04 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes since U-Boot 0.2.1:
======================================================================
+* Patch by Stefan Roese, 17 Feb 2003:
+ Fixed bug in ext. serial clock setup on PPC405 (since PPC440 port).
+
* Patch by Stefan Roese, 13 Feb 2003:
Add "pcidelay" environment variable (in ms, enabled via
CONFIG_PCI_BOOTDELAY).
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index d02ff2f..7e684f4 100644
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -279,7 +279,7 @@ int serial_tstc ()
#define UART0_BASE 0xef600300
#define UART1_BASE 0xef600400
#define CR0_MASK 0x00001fff
-#define CR0_EXTCLK_ENA 0x00000c00
+#define CR0_EXTCLK_ENA 0x000000c0
#define CR0_UDIV_POS 1
#endif