diff options
| author | Stephen Warren <swarren@nvidia.com> | 2014-02-03 14:03:24 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2014-03-05 16:59:07 -0700 |
| commit | cd7efc2a947b30a2047b248f66ddfa8b182fda64 (patch) | |
| tree | 839d13b143d80afc1e2082f2c22dd3c1e011b574 | |
| parent | cc07294bc704694ae33db75b25ac557e5917a83f (diff) | |
| download | u-boot-imx-cd7efc2a947b30a2047b248f66ddfa8b182fda64.zip u-boot-imx-cd7efc2a947b30a2047b248f66ddfa8b182fda64.tar.gz u-boot-imx-cd7efc2a947b30a2047b248f66ddfa8b182fda64.tar.bz2 | |
ARM: tegra: move CONFIG_TEGRAnn
<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/include/asm/arch-tegra114/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra124/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra30/tegra.h | 2 | ||||
| -rw-r--r-- | include/configs/tegra114-common.h | 5 | ||||
| -rw-r--r-- | include/configs/tegra124-common.h | 5 | ||||
| -rw-r--r-- | include/configs/tegra20-common.h | 5 | ||||
| -rw-r--r-- | include/configs/tegra30-common.h | 5 |
8 files changed, 8 insertions, 20 deletions
diff --git a/arch/arm/include/asm/arch-tegra114/tegra.h b/arch/arm/include/asm/arch-tegra114/tegra.h index 5d426b5..705ca57 100644 --- a/arch/arm/include/asm/arch-tegra114/tegra.h +++ b/arch/arm/include/asm/arch-tegra114/tegra.h @@ -17,6 +17,8 @@ #ifndef _TEGRA114_H_ #define _TEGRA114_H_ +#define CONFIG_TEGRA114 + #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ diff --git a/arch/arm/include/asm/arch-tegra124/tegra.h b/arch/arm/include/asm/arch-tegra124/tegra.h index db3d837..86ebd19 100644 --- a/arch/arm/include/asm/arch-tegra124/tegra.h +++ b/arch/arm/include/asm/arch-tegra124/tegra.h @@ -8,6 +8,8 @@ #ifndef _TEGRA124_H_ #define _TEGRA124_H_ +#define CONFIG_TEGRA124 + #define NV_PA_SDRAM_BASE 0x80000000 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h index 18856ac..6a4b40e 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra.h +++ b/arch/arm/include/asm/arch-tegra20/tegra.h @@ -8,6 +8,8 @@ #ifndef _TEGRA20_H_ #define _TEGRA20_H_ +#define CONFIG_TEGRA20 + #define NV_PA_SDRAM_BASE 0x00000000 #include <asm/arch-tegra/tegra.h> diff --git a/arch/arm/include/asm/arch-tegra30/tegra.h b/arch/arm/include/asm/arch-tegra30/tegra.h index c02c5d8..4ad8b1c 100644 --- a/arch/arm/include/asm/arch-tegra30/tegra.h +++ b/arch/arm/include/asm/arch-tegra30/tegra.h @@ -17,6 +17,8 @@ #ifndef _TEGRA30_H_ #define _TEGRA30_H_ +#define CONFIG_TEGRA30 + #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */ #include <asm/arch-tegra/tegra.h> diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index a4e8a5f..1bf5af5 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -26,11 +26,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA114 /* in a NVidia Tegra114 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 0a4541b..4568bc7 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -18,11 +18,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA124 /* is an NVIDIA Tegra124 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index b009a31..d2c4532 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -24,11 +24,6 @@ */ #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x00408000 /* def. location for kernel */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index b5550d7..edb930e 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -23,11 +23,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA30 /* in a NVidia Tegra30 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ |