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authorMacpaul Lin <macpaul@andestech.com>2011-03-20 23:44:06 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-04-27 19:38:08 +0200
commitcaddb8e41e178d3a27aebf6a15bb5e201481d93b (patch)
tree8076388a5ccab8a48deb9e2369e6132c12e84ace
parent286a5b253a5a154d8b0a1403258bc8b99600fc98 (diff)
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ftpmu010: fix relocation and enhance features
1. ftpmu010.h: fix and add definitions Enhanced for more features and asm related support according to datasheet. Note: - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet. - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19) - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21) 2. ftpmu010.c: enhance features and fix relocation - The following functions is added for pmu features. ftpmu010_mfpsr_select_dev() ftpmu010_sdramhtc_set() - This patch also fix the declare statement for relocation. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
-rw-r--r--drivers/power/ftpmu010.c39
-rw-r--r--include/faraday/ftpmu010.h38
2 files changed, 72 insertions, 5 deletions
diff --git a/drivers/power/ftpmu010.c b/drivers/power/ftpmu010.c
index c6a8cda..df99dfa 100644
--- a/drivers/power/ftpmu010.c
+++ b/drivers/power/ftpmu010.c
@@ -25,10 +25,10 @@
#include <asm/io.h>
#include <faraday/ftpmu010.h>
-static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
-
+/* OSCC: OSC Control Register */
void ftpmu010_32768osc_enable(void)
{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
unsigned int oscc;
/* enable the 32768Hz oscillator */
@@ -46,8 +46,31 @@ void ftpmu010_32768osc_enable(void)
writel(oscc, &pmu->OSCC);
}
+/* MFPSR: Multi-Function Port Setting Register */
+void ftpmu010_mfpsr_select_dev(unsigned int dev)
+{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+ unsigned int mfpsr;
+
+ mfpsr = readl(&pmu->MFPSR);
+ mfpsr |= dev;
+ writel(mfpsr, &pmu->MFPSR);
+}
+
+void ftpmu010_mfpsr_diselect_dev(unsigned int dev)
+{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+ unsigned int mfpsr;
+
+ mfpsr = readl(&pmu->MFPSR);
+ mfpsr &= ~dev;
+ writel(mfpsr, &pmu->MFPSR);
+}
+
+/* PDLLCR0: PLL/DLL Control Register 0 */
void ftpmu010_dlldis_disable(void)
{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
unsigned int pdllcr0;
pdllcr0 = readl(&pmu->PDLLCR0);
@@ -57,9 +80,21 @@ void ftpmu010_dlldis_disable(void)
void ftpmu010_sdram_clk_disable(unsigned int cr0)
{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
unsigned int pdllcr0;
pdllcr0 = readl(&pmu->PDLLCR0);
pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
writel(pdllcr0, &pmu->PDLLCR0);
}
+
+/* SDRAMHTC: SDRAM Signal Hold Time Control */
+void ftpmu010_sdramhtc_set(unsigned int val)
+{
+ static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
+ unsigned int sdramhtc;
+
+ sdramhtc = readl(&pmu->SDRAMHTC);
+ sdramhtc |= val;
+ writel(sdramhtc, &pmu->SDRAMHTC);
+}
diff --git a/include/faraday/ftpmu010.h b/include/faraday/ftpmu010.h
index 640f056..bd40c53 100644
--- a/include/faraday/ftpmu010.h
+++ b/include/faraday/ftpmu010.h
@@ -126,23 +126,55 @@ struct ftpmu010 {
/*
* Multi-Function Port Setting Register
*/
+#define FTPMU010_MFPSR_DEBUGSEL (1 << 17)
+#define FTPMU010_MFPSR_DMA0PINSEL (1 << 16)
+#define FTPMU010_MFPSR_DMA1PINSEL (1 << 15)
#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14)
#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13)
+#define FTPMU010_MFPSR_PWM1PINSEL (1 << 11)
+#define FTPMU010_MFPSR_PWM0PINSEL (1 << 10)
+#define FTPMU010_MFPSR_IRDACLKSEL (1 << 9)
+#define FTPMU010_MFPSR_UARTCLKSEL (1 << 8)
+#define FTPMU010_MFPSR_SSPCLKSEL (1 << 6)
+#define FTPMU010_MFPSR_I2SCLKSEL (1 << 5)
+#define FTPMU010_MFPSR_AC97CLKSEL (1 << 4)
#define FTPMU010_MFPSR_AC97PINSEL (1 << 3)
+#define FTPMU010_MFPSR_TRIAHBDIS (1 << 1)
+#define FTPMU010_MFPSR_TRIAHBDBG (1 << 0)
/*
* PLL/DLL Control Register 0
+ * Note:
+ * 1. FTPMU010_PDLLCR0_HCLKOUTDIS:
+ * Datasheet indicated it starts at bit #21 which was wrong.
+ * 2. FTPMU010_PDLLCR0_DLLFRAG:
+ * Datasheet indicated it has 2 bit which was wrong.
*/
-#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) >> 20) & 0xf)
-#define FTPMU010_PDLLCR0_DLLFRAG (1 << 19)
+#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20)
+#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19)
#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18)
#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17)
#define FTPMU010_PDLLCR0_DLLDIS (1 << 16)
-#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) >> 3) & 0x1ff)
+#define FTPMU010_PDLLCR0_PLL1FRANG(cr0) (((cr0) & 0x3) << 12)
+#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) & 0x1ff) << 3)
#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2)
#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1)
#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0)
+/*
+ * SDRAM Signal Hold Time Control Register
+ */
+#define FTPMU010_SDRAMHTC_RCLK_DLY(x) (((x) & 0xf) << 28)
+#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x) (((x) & 0xf) << 24)
+#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x) (((x) & 0xf) << 20)
+#define FTPMU010_SDRAMHTC_EBICTRL_DCSR (1 << 18)
+#define FTPMU010_SDRAMHTC_EBIDATA_DCSR (1 << 17)
+#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR (1 << 16)
+#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR (1 << 15)
+#define FTPMU010_SDRAMHTC_CKE_DCSR (1 << 14)
+#define FTPMU010_SDRAMHTC_DQM_DCSR (1 << 13)
+#define FTPMU010_SDRAMHTC_SDCLK_DCSR (1 << 12)
+
void ftpmu010_32768osc_enable(void);
void ftpmu010_dlldis_disable(void);
void ftpmu010_sdram_clk_disable(unsigned int cr0);