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| author | Peng Fan <peng.fan@nxp.com> | 2015-12-23 10:52:01 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2016-03-04 15:53:35 +0800 |
| commit | caa91e6022394c9ac1af3891a60871915b25fe77 (patch) | |
| tree | da1ce53974363a49a7771d9fc0af2ba7e60840c5 | |
| parent | 945bc1c963981fc15dbfeb82f0d9c024d31633c6 (diff) | |
| download | u-boot-imx-caa91e6022394c9ac1af3891a60871915b25fe77.zip u-boot-imx-caa91e6022394c9ac1af3891a60871915b25fe77.tar.gz u-boot-imx-caa91e6022394c9ac1af3891a60871915b25fe77.tar.bz2 | |
MLK-12066 imx: mx7: default enable MDIO open drain
The management data input/output (MDIO) requires open-drain,
i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports
this feature. So to TO1.1, need to enable open drain by setting
bits GPR0[8:7] for TO1.1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx7/soc.c | 20 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx7/imx-regs.h | 2 |
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index 58621ce..d718e67 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -170,6 +170,24 @@ static void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog4->wmcr); } +static void imx_enet_mdio_fixup(void) +{ + struct iomuxc_gpr_base_regs *gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + /* + * The management data input/output (MDIO) requires open-drain, + * i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports + * this feature. So to TO1.1, need to enable open drain by setting + * bits GPR0[8:7]. + */ + + if (is_soc_rev(CHIP_REV_1_1) >= 0) { + setbits_le32(&gpr_regs->gpr[0], + IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK); + } +} + static void set_epdc_qos(void) { #define REGS_QOS_BASE QOSC_IPS_BASE_ADDR @@ -208,6 +226,8 @@ int arch_cpu_init(void) imx_set_pcie_phy_power_down(); + imx_enet_mdio_fixup(); + #ifdef CONFIG_APBH_DMA /* Start APBH DMA */ mxs_dma_init(); diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 532b0da..cf88831 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -273,6 +273,8 @@ struct src { #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_SHIFT 5 #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_MASK 0x40u #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_SHIFT 6 +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK (3 << 7) +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_SHIFT 7 /* GPR1 Bit Fields */ #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_MASK 0x1u #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_SHIFT 0 |