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authorAubrey Li <aubrey.adi@gmail.com>2007-03-19 23:01:15 +0800
committerAubrey Li <aubrey.adi@gmail.com>2007-03-19 23:01:15 +0800
commita20e7106928a284a6d14c066c54b72e552075b06 (patch)
treee3dde666da99073732b97778e030d1beb0e75c09
parenta6154fd1cfd020f6da8527e0365b1020a11a71d0 (diff)
parentcf3b41e0c1111dbb865b6e34e9f3c3d3145a6093 (diff)
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Merge http://www.denx.de/git/u-boot
-rw-r--r--board/amcc/sequoia/sequoia.c4
-rw-r--r--board/esd/plu405/plu405.c17
-rw-r--r--common/cmd_i2c.c42
-rw-r--r--cpu/ppc4xx/i2c.c2
-rw-r--r--include/configs/PLU405.h8
-rw-r--r--include/i2c.h3
6 files changed, 43 insertions, 33 deletions
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index b2b82c7..daaffe0 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -336,6 +336,10 @@ int misc_init_r(void)
}
#endif /* CONFIG_440EPX */
+ mfsdr(SDR0_SRST1, reg); /* enable security/kasumi engines */
+ reg &= ~(SDR0_SRST1_CRYP0 | SDR0_SRST1_KASU0);
+ mtsdr(SDR0_SRST1, reg);
+
/*
* Clear PLB4A0_ACR[WRP]
* This fix will make the MAL burst disabling patch for the Linux
diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c
index 37b92fb..59171f8 100644
--- a/board/esd/plu405/plu405.c
+++ b/board/esd/plu405/plu405.c
@@ -215,12 +215,6 @@ int checkboard (void)
}
putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
return 0;
}
@@ -292,3 +286,14 @@ void board_auto_update_show(int au_active)
}
}
#endif
+
+void reset_phy(void)
+{
+#ifdef CONFIG_LXT971_NO_SLEEP
+
+ /*
+ * Disable sleep mode in LXT971
+ */
+ lxt971_no_sleep();
+#endif
+}
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 45cfde2..34571ee 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -701,6 +701,7 @@ int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
switch(data[2]) {
case 2: puts ("EDO\n"); break;
case 4: puts ("SDRAM\n"); break;
+ case 8: puts ("DDR2\n"); break;
default: puts ("unknown\n"); break;
}
puts ("Row address bits ");
@@ -722,6 +723,7 @@ int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
case 2: puts ("HSTL 1.5\n"); break;
case 3: puts ("SSTL 3.3\n"); break;
case 4: puts ("SSTL 2.5\n"); break;
+ case 5: puts ("SSTL 1.8\n"); break;
default: puts ("unknown\n"); break;
}
printf("SDRAM cycle time %d.%d nS\n",
@@ -948,6 +950,26 @@ int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
/***************************************************/
+#if defined(CONFIG_I2C_CMD_TREE)
+U_BOOT_CMD(
+ i2c, 6, 1, do_i2c,
+ "i2c - I2C sub-system\n",
+#if defined(CONFIG_I2C_MULTI_BUS)
+ "dev [dev] - show or set current I2C bus\n"
+#endif /* CONFIG_I2C_MULTI_BUS */
+ "i2c speed [speed] - show or set I2C bus speed\n"
+ "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
+ "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
+ "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
+ "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
+ "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
+ "i2c probe - show devices on the I2C bus\n"
+ "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
+#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
+ "i2c sdram chip - print SDRAM configuration information\n"
+#endif /* CFG_CMD_SDRAM */
+);
+#else /* CONFIG_I2C_CMD_TREE */
U_BOOT_CMD(
imd, 4, 1, do_i2c_md, \
"imd - i2c memory display\n", \
@@ -1002,26 +1024,6 @@ U_BOOT_CMD(
" (valid chip values 50..57)\n"
);
#endif
-
-#if defined(CONFIG_I2C_CMD_TREE)
-U_BOOT_CMD(
- i2c, 6, 1, do_i2c,
- "i2c - I2C sub-system\n",
-#if defined(CONFIG_I2C_MULTI_BUS)
- "dev [dev] - show or set current I2C bus\n"
-#endif /* CONFIG_I2C_MULTI_BUS */
- "i2c speed [speed] - show or set I2C bus speed\n"
- "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
- "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
- "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
- "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
- "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
- "i2c probe - show devices on the I2C bus\n"
- "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
-#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
- "i2c sdram chip - print SDRAM configuration information\n"
-#endif /* CFG_CMD_SDRAM */
-);
#endif /* CONFIG_I2C_CMD_TREE */
#endif /* CFG_CMD_I2C */
diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c
index 0b056a1..8f4da86 100644
--- a/cpu/ppc4xx/i2c.c
+++ b/cpu/ppc4xx/i2c.c
@@ -460,6 +460,7 @@ int i2c_set_bus_num(unsigned int bus)
return 0;
}
+#endif /* CONFIG_I2C_MULTI_BUS */
/* TODO: add 100/400k switching */
unsigned int i2c_get_bus_speed(void)
@@ -474,5 +475,4 @@ int i2c_set_bus_speed(unsigned int speed)
return 0;
}
-#endif /* CONFIG_I2C_MULTI_BUS */
#endif /* CONFIG_HARD_I2C */
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index dd5d831..d02c39b 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -51,17 +51,13 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if 0 /* test-only */
#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_PHY1_ADDR 1 /* PHY address */
-#else
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 0 /* PHY address */
-#endif
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
diff --git a/include/i2c.h b/include/i2c.h
index d31c72d..6e6c845 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -63,6 +63,9 @@
#if !defined(CFG_DTT_BUS_NUM)
#define CFG_DTT_BUS_NUM 0
#endif
+#if !defined(CFG_SPD_BUS_NUM)
+#define CFG_SPD_BUS_NUM 0
+#endif
/*
* Initialization, must be called once on start up, may be called