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authorManjunath Hadli <manjunath.hadli@ti.com>2011-10-07 23:34:37 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:35 +0200
commit83244a3885310249aac377bdc592cb46e9cf4329 (patch)
tree819b325ed7084ba88470843ea71e80dc1726afee
parent32317a5b7c8792f7186f84c5dbb48937a7168009 (diff)
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dm36x: revert cache disable patch
revert commit 98c19aff9524e1d0dd6bf39bf7bde5644f121feb as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
-rw-r--r--include/configs/davinci_dm365evm.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h
index 323c0b4..5fa2e56 100644
--- a/include/configs/davinci_dm365evm.h
+++ b/include/configs/davinci_dm365evm.h
@@ -33,9 +33,6 @@
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM365
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-#define CONFIG_SYS_L2CACHE_OFF
/* Memory Info */
#define CONFIG_NR_DRAM_BANKS 1