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authorWolfgang Denk <wd@denx.de>2008-07-10 21:53:51 +0200
committerWolfgang Denk <wd@denx.de>2008-07-10 21:53:51 +0200
commit79d14faf5471b7fdc4244cb6299e94e8170d826e (patch)
treee35eef45c8bf151e7de953602fb5b1b61793be0f
parent3d71c81a9bb03f866a1e98da96363ef3f46c76b3 (diff)
parent859f24350e6e4313626f85161dd03f025a4dac59 (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c5
-rw-r--r--board/freescale/mpc8641hpcn/mpc8641hpcn.c6
-rw-r--r--cpu/mpc86xx/cpu.c14
-rw-r--r--cpu/mpc86xx/interrupts.c1
-rw-r--r--include/asm-ppc/immap_86xx.h16
-rw-r--r--include/configs/MPC8610HPCD.h3
6 files changed, 40 insertions, 5 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index c85f373..0bf21d5 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -99,7 +99,10 @@ int checkboard(void)
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
- puts("Board: MPC8610HPCD\n");
+ printf ("Board: MPC8610HPCD, System ID: 0x%02lx, "
+ "System Version: 0x%02lx, FPGA Version: 0x%02lx\n",
+ in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+ in8(PIXIS_BASE + PIXIS_PVER));
mcm->abcr |= 0x00010000; /* 0 */
mcm->hpmr3 = 0x80000008; /* 4c */
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index cf540fc..b30c6b1 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -47,8 +47,10 @@ int board_early_init_f(void)
int checkboard(void)
{
- puts("Board: MPC8641HPCN\n");
-
+ printf ("Board: MPC8641HPCN, System ID: 0x%02lx, "
+ "System Version: 0x%02lx, FPGA Version: 0x%02lx\n",
+ in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+ in8(PIXIS_BASE + PIXIS_PVER));
return 0;
}
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 7d2b591..ecea5b0 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -214,6 +214,20 @@ get_tbclk(void)
void
watchdog_reset(void)
{
+#if defined(CONFIG_MPC8610)
+ /*
+ * This actually feed the hard enabled watchdog.
+ */
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile ccsr_wdt_t *wdt = &immap->im_wdt;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ u32 tmp = gur->pordevsr;
+
+ if (tmp & 0x4000) {
+ wdt->swsrr = 0x556c;
+ wdt->swsrr = 0xaa39;
+ }
+#endif
}
#endif /* CONFIG_WATCHDOG */
diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c
index d9f634f..f16744b 100644
--- a/cpu/mpc86xx/interrupts.c
+++ b/cpu/mpc86xx/interrupts.c
@@ -36,6 +36,7 @@
#include <command.h>
#include <asm/processor.h>
#include <ppc_asm.tmpl>
+#include <watchdog.h>
unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
unsigned long timestamp;
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index c03b4b8..03a25c7 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1304,9 +1304,21 @@ typedef struct ccsr_gur {
uint lynxdcr1; /* 0xe0f08 - Lynx debug control register 1*/
int res14[6];
uint ddrioovcr; /* 0xe0f24 - DDR IO Overdrive Control register */
- char res15[61656];
+ char res15[216];
} ccsr_gur_t;
+/*
+ * Watchdog register block(0xe_4000-0xe_4fff)
+ */
+typedef struct ccsr_wdt {
+ uint res0;
+ uint swcrr; /* System watchdog control register */
+ uint swcnr; /* System watchdog count register */
+ char res1[2];
+ ushort swsrr; /* System watchdog service register */
+ char res2[4080];
+} ccsr_wdt_t;
+
typedef struct immap {
ccsr_local_mcm_t im_local_mcm;
ccsr_ddr_t im_ddr1;
@@ -1330,6 +1342,8 @@ typedef struct immap {
char res5[389120];
ccsr_rio_t im_rio;
ccsr_gur_t im_gur;
+ char res6[12288];
+ ccsr_wdt_t im_wdt;
} immap_t;
extern immap_t *immr;
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index fc16890..98ae34c 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -485,7 +485,8 @@
#endif
-#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_WATCHDOG /* watchdog enabled */
+#define CFG_WATCHDOG_FREQ 5000 /* Feed interval, 5s */
/*DIU Configuration*/
#define DIU_CONNECT_TO_DVI /* DIU controller connects to DVI encoder*/