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authorFabio Estevam <fabio.estevam@freescale.com>2012-10-23 06:36:18 +0000
committerStefano Babic <sbabic@denx.de>2012-10-26 16:28:07 +0200
commit787f4f30823a15b1e45c0a0b901cfa5bd415e251 (patch)
tree074ace044dcbba5ed710eb0a0d1cada04e4b9f9a
parente100a3d52ebfb4604cca04710a31dfbc91225e96 (diff)
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pmic: Add support for mc34704
Add the register layout for the MC34704 PMIC from Freescale. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-rw-r--r--drivers/misc/pmic_fsl.c2
-rw-r--r--include/mc34704.h49
2 files changed, 51 insertions, 0 deletions
diff --git a/drivers/misc/pmic_fsl.c b/drivers/misc/pmic_fsl.c
index 9d80b55..c8d4c8d 100644
--- a/drivers/misc/pmic_fsl.c
+++ b/drivers/misc/pmic_fsl.c
@@ -28,6 +28,8 @@
#if defined(CONFIG_PMIC_FSL_MC13892)
#define FSL_PMIC_I2C_LENGTH 3
+#elif defined(CONFIG_PMIC_FSL_MC34704)
+#define FSL_PMIC_I2C_LENGTH 1
#endif
#if defined(CONFIG_PMIC_SPI)
diff --git a/include/mc34704.h b/include/mc34704.h
new file mode 100644
index 0000000..6611d54
--- /dev/null
+++ b/include/mc34704.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ */
+
+#ifndef __MC34704_H__
+#define __MC34704_H__
+
+enum {
+ MC34704_RESERVED0_REG = 0, /* 0x00 */
+ MC34704_GENERAL1_REG, /* 0x01 */
+ MC34704_GENERAL2_REG, /* 0x02 */
+ MC34704_GENERAL3_REG, /* 0x03 */
+ MC34704_RESERVED4_REG, /* 0x04 */
+ MC34704_VGSET2_REG, /* 0x05 */
+ MC34704_REG2SET1_REG, /* 0x06 */
+ MC34704_REG2SET2_REG, /* 0x07 */
+ MC34704_REG3SET1_REG, /* 0x08 */
+ MC34704_REG3SET2_REG, /* 0x09 */
+ MC34704_REG4SET1_REG, /* 0x0a */
+ MC34704_REG4SET2_REG, /* 0x0b */
+ MC34704_REG5SET1_REG, /* 0x0c */
+ MC34704_REG5SET2_REG, /* 0x0d */
+ MC34704_REG5SET3_REG, /* 0x0e */
+ MC34704_RESERVEDF_REG, /* 0x0f */
+ MC34704_RESERVED10_REG, /* 0x10 */
+ MC34704_RESERVED11_REG, /* 0x11 */
+ MC34704_RESERVED12_REG, /* 0x12 */
+ MC34704_FSW2SET_REG, /* 0x13 */
+ MC34704_RESERVED14_REG, /* 0x14 */
+ MC34704_REG8SET1_REG, /* 0x15 */
+ MC34704_REG8SET2_REG, /* 0x16 */
+ MC34704_REG8SET3_REG, /* 0x17 */
+ MC34704_FAULTS_REG, /* 0x18 */
+ MC34704_I2CSET1, /* 0x19 */
+ MC34704_NUM_OF_REGS,
+};
+
+/* GENERAL2 register fields */
+#define ONOFFE (1 << 0)
+#define ONOFFD (1 << 1)
+#define ALLOFF (1 << 4)
+
+#endif /* __MC34704_H__ */