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| author | Stefan Roese <sr@denx.de> | 2014-11-27 13:46:43 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-12-01 10:20:20 +0100 |
| commit | 7731745c139a4e8591cde93174c1be3277f0b94b (patch) | |
| tree | f025dd4820c01b8af98b0cb67fca44221689a1b1 | |
| parent | dd1c8f1b5fb63a682fce62a53464108d8587b0a2 (diff) | |
| download | u-boot-imx-7731745c139a4e8591cde93174c1be3277f0b94b.zip u-boot-imx-7731745c139a4e8591cde93174c1be3277f0b94b.tar.gz u-boot-imx-7731745c139a4e8591cde93174c1be3277f0b94b.tar.bz2 | |
arm: mx6: Change defines ENET_xxMHz to ENET_xxMHZ (no CamelCase)
As checkpatch complaines about these camel-case defines, lets change
them to only use upper-case characters.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 8 | ||||
| -rw-r--r-- | board/aristainetos/aristainetos.c | 2 | ||||
| -rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 2 | ||||
| -rw-r--r-- | board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 | ||||
| -rw-r--r-- | board/solidrun/hummingboard/hummingboard.c | 2 |
6 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index ab7ac3d..93a02ad 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -443,7 +443,7 @@ int enable_fec_anatop_clock(enum enet_freq freq) struct anatop_regs __iomem *anatop = (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; - if (freq < ENET_25MHz || freq > ENET_125MHz) + if (freq < ENET_25MHZ || freq > ENET_125MHZ) return -EINVAL; reg = readl(&anatop->pll_enet); diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 323805c..226a4cd 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -43,10 +43,10 @@ enum mxc_clock { }; enum enet_freq { - ENET_25MHz, - ENET_50MHz, - ENET_100MHz, - ENET_125MHz, + ENET_25MHZ, + ENET_50MHZ, + ENET_100MHZ, + ENET_125MHZ, }; u32 imx_get_uartclk(void); diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 06922c0..67ac260 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -301,7 +301,7 @@ int board_eth_init(bd_t *bis) /* clear gpr1[14], gpr1[18:17] to select anatop clock */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); - ret = enable_fec_anatop_clock(ENET_50MHz); + ret = enable_fec_anatop_clock(ENET_50MHZ); if (ret) return ret; diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 8111edf..cac6d73 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -234,7 +234,7 @@ static int setup_fec(void) /* clear gpr1[14], gpr1[18:17] to select anatop clock */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); - return enable_fec_anatop_clock(ENET_50MHz); + return enable_fec_anatop_clock(ENET_50MHZ); } #endif diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 7aee074..8b959b9 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -168,7 +168,7 @@ static int setup_fec(void) reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE; writel(reg, &anatop->pll_enet); - return enable_fec_anatop_clock(ENET_125MHz); + return enable_fec_anatop_clock(ENET_125MHZ); } int board_eth_init(bd_t *bis) diff --git a/board/solidrun/hummingboard/hummingboard.c b/board/solidrun/hummingboard/hummingboard.c index 6d204b3..52c384b 100644 --- a/board/solidrun/hummingboard/hummingboard.c +++ b/board/solidrun/hummingboard/hummingboard.c @@ -146,7 +146,7 @@ int board_eth_init(bd_t *bis) { struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; - int ret = enable_fec_anatop_clock(ENET_25MHz); + int ret = enable_fec_anatop_clock(ENET_25MHZ); if (ret) return ret; |