diff options
author | Marek Vasut <marex@denx.de> | 2012-08-26 15:19:07 +0000 |
---|---|---|
committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 02:53:35 -0500 |
commit | 4e6d81d1a4f042760287b31a6dc121b4ad754b7c (patch) | |
tree | 6693fdf37f35b31d41cc6fdf50fcdd1cc85881e1 | |
parent | b660df3c9031ba2efded2d083c34f2ea5ff978ff (diff) | |
download | u-boot-imx-4e6d81d1a4f042760287b31a6dc121b4ad754b7c.zip u-boot-imx-4e6d81d1a4f042760287b31a6dc121b4ad754b7c.tar.gz u-boot-imx-4e6d81d1a4f042760287b31a6dc121b4ad754b7c.tar.bz2 |
MMC: MXS: Convert MXS MMC driver to generic bounce buffer
Implement necessary code to use the generic bounce buffer routines
inside this driver. This replaces the MMC bounce buffer, which is
to be removed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
-rw-r--r-- | drivers/mmc/mxsmmc.c | 36 |
1 files changed, 23 insertions, 13 deletions
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index c80b41b..109acbf 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -42,6 +42,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> #include <asm/arch/dma.h> +#include <bouncebuf.h> struct mxsmmc_priv { int id; @@ -95,28 +96,33 @@ static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data) static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) { uint32_t data_count = data->blocksize * data->blocks; - uint32_t cache_data_count; + uint32_t cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); int dmach; struct mxs_dma_desc *desc = priv->desc; + void *addr, *backup; + uint8_t flags; memset(desc, 0, sizeof(struct mxs_dma_desc)); desc->address = (dma_addr_t)desc; - if (data_count % ARCH_DMA_MINALIGN) - cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); - else - cache_data_count = data_count; - if (data->flags & MMC_DATA_READ) { priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; - priv->desc->cmd.address = (dma_addr_t)data->dest; + addr = data->dest; + flags = GEN_BB_WRITE; } else { priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; - priv->desc->cmd.address = (dma_addr_t)data->src; + addr = (void *)data->src; + flags = GEN_BB_READ; + } + + bounce_buffer_start(&addr, data_count, &backup, flags); + + priv->desc->cmd.address = (dma_addr_t)addr; + if (data->flags & MMC_DATA_WRITE) { /* Flush data to DRAM so DMA can pick them up */ - flush_dcache_range((uint32_t)priv->desc->cmd.address, - (uint32_t)(priv->desc->cmd.address + cache_data_count)); + flush_dcache_range((uint32_t)addr, + (uint32_t)(addr) + cache_data_count); } /* Invalidate the area, so no writeback into the RAM races with DMA */ @@ -128,15 +134,19 @@ static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; mxs_dma_desc_append(dmach, priv->desc); - if (mxs_dma_go(dmach)) + if (mxs_dma_go(dmach)) { + bounce_buffer_stop(&addr, data_count, &backup, flags); return COMM_ERR; + } /* The data arrived into DRAM, invalidate cache over them */ if (data->flags & MMC_DATA_READ) { - invalidate_dcache_range((uint32_t)priv->desc->cmd.address, - (uint32_t)(priv->desc->cmd.address + cache_data_count)); + invalidate_dcache_range((uint32_t)addr, + (uint32_t)(addr) + cache_data_count); } + bounce_buffer_stop(&addr, data_count, &backup, flags); + return 0; } |