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authorJon Loeliger <jdl@jdl.com>2006-05-31 11:24:28 -0500
committerJon Loeliger <jdl@jdl.com>2006-05-31 11:24:28 -0500
commit4d3d729c16c392d2982d3266b659d333c927697d (patch)
treea0792b19aed5a0aec35a7e1acadc96fa3510483d
parentb2a941de060350ad15878d8219825f4950e9bb8e (diff)
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Moved mpc8641hpcn_board_reset() out of cpu/ into board/.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
-rw-r--r--board/mpc8641hpcn/mpc8641hpcn.c93
-rw-r--r--cpu/mpc86xx/cpu.c90
2 files changed, 99 insertions, 84 deletions
diff --git a/board/mpc8641hpcn/mpc8641hpcn.c b/board/mpc8641hpcn/mpc8641hpcn.c
index d02a7ef..dbc9b5e 100644
--- a/board/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/mpc8641hpcn/mpc8641hpcn.c
@@ -25,6 +25,7 @@
*/
#include <common.h>
+#include <command.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_86xx.h>
@@ -35,6 +36,9 @@
extern void ft_cpu_setup(void *blob, bd_t *bd);
#endif
+#include "pixis.h"
+
+
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
@@ -292,4 +296,93 @@ ft_board_setup(void *blob, bd_t *bd)
#endif
+void
+mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ char cmd;
+ ulong val;
+ ulong corepll;
+
+ if (argc > 1) {
+ cmd = argv[1][1];
+ switch (cmd) {
+ case 'f': /* reset with frequency changed */
+ if (argc < 5)
+ goto my_usage;
+ read_from_px_regs(0);
+
+ val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10));
+
+ corepll = strfractoint(argv[3]);
+ val = val + set_px_corepll(corepll);
+ val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10));
+ if (val == 3) {
+ printf("Setting registers VCFGEN0 and VCTL\n");
+ read_from_px_regs(1);
+ printf("Resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL ....\n");
+ set_px_go();
+ } else
+ goto my_usage;
+
+ while (1); /* Not reached */
+
+ case 'l':
+ if (argv[2][1] == 'f') {
+ read_from_px_regs(0);
+ read_from_px_regs_altbank(0);
+ /* reset with frequency changed */
+ val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10));
+
+ corepll = strfractoint(argv[4]);
+ val = val + set_px_corepll(corepll);
+ val = val + set_px_mpxpll(simple_strtoul(argv[5], NULL, 10));
+ if (val == 3) {
+ printf("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
+ set_altbank();
+ read_from_px_regs(1);
+ read_from_px_regs_altbank(1);
+ printf("Enabling watchdog timer on the FPGA and resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL to boot from the other bank ....\n");
+ set_px_go_with_watchdog();
+ } else
+ goto my_usage;
+
+ while(1); /* Not reached */
+
+ } else if(argv[2][1] == 'd'){
+ /* Reset from next bank without changing frequencies but with watchdog timer enabled */
+ read_from_px_regs(0);
+ read_from_px_regs_altbank(0);
+ printf("Setting registers VCFGEN1, VBOOT, and VCTL\n");
+ set_altbank();
+ read_from_px_regs_altbank(1);
+ printf("Enabling watchdog timer on the FPGA and resetting board to boot from the other bank....\n");
+ set_px_go_with_watchdog();
+ while(1); /* Not reached */
+
+ } else {
+ /* Reset from next bank without changing frequency and without watchdog timer enabled */
+ read_from_px_regs(0);
+ read_from_px_regs_altbank(0);
+ if(argc > 2)
+ goto my_usage;
+ printf("Setting registers VCFGNE1, VBOOT, and VCTL\n");
+ set_altbank();
+ read_from_px_regs_altbank(1);
+ printf("Resetting board to boot from the other bank....\n");
+ set_px_go();
+ }
+
+ default:
+ goto my_usage;
+ }
+
+ my_usage:
+ printf("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
+ printf(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
+ printf("For example: reset cf 40 2.5 10\n");
+ printf("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
+ return;
+ } else
+ out8(PIXIS_BASE+PIXIS_RST,0);
+}
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 504ba62..60ce29c 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -32,7 +32,10 @@
#include <ft_build.h>
#endif
-#include "../board/mpc8641hpcn/pixis.h"
+#ifdef CONFIG_MPC8641HPCN
+extern void mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag,
+ int argc, char *argv[]);
+#endif
int checkcpu (void)
@@ -146,9 +149,7 @@ soft_restart(unsigned long addr)
void
do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- char cmd;
- ulong addr, val;
- ulong corepll;
+ ulong addr;
#ifdef CFG_RESET_ADDRESS
addr = CFG_RESET_ADDRESS;
@@ -181,86 +182,7 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#else /* CONFIG_MPC8641HPCN */
- if (argc > 1) {
- cmd = argv[1][1];
- switch(cmd) {
- case 'f': /* reset with frequency changed */
- if (argc < 5)
- goto my_usage;
- read_from_px_regs(0);
-
- val = set_px_sysclk(simple_strtoul(argv[2],NULL,10));
-
- corepll = strfractoint(argv[3]);
- val = val + set_px_corepll(corepll);
- val = val + set_px_mpxpll(simple_strtoul(argv[4],
- NULL, 10));
- if (val == 3) {
- printf("Setting registers VCFGEN0 and VCTL\n");
- read_from_px_regs(1);
- printf("Resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL ....\n");
- set_px_go();
- } else
- goto my_usage;
-
- while (1); /* Not reached */
-
- case 'l':
- if (argv[2][1] == 'f') {
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- /* reset with frequency changed */
- val = set_px_sysclk(simple_strtoul(argv[3],NULL,10));
-
- corepll = strfractoint(argv[4]);
- val = val + set_px_corepll(corepll);
- val = val + set_px_mpxpll(simple_strtoul(argv[5],NULL,10));
- if (val == 3) {
- printf("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs(1);
- read_from_px_regs_altbank(1);
- printf("Enabling watchdog timer on the FPGA and resetting board with values from VSPEED0, VSPEED1, VCLKH, and VCLKL to boot from the other bank ....\n");
- set_px_go_with_watchdog();
- } else
- goto my_usage;
-
- while(1); /* Not reached */
- } else if(argv[2][1] == 'd'){
- /* Reset from next bank without changing frequencies but with watchdog timer enabled */
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- printf("Setting registers VCFGEN1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs_altbank(1);
- printf("Enabling watchdog timer on the FPGA and resetting board to boot from the other bank....\n");
- set_px_go_with_watchdog();
- while(1); /* Not reached */
- } else {
- /* Reset from next bank without changing frequency and without watchdog timer enabled */
- read_from_px_regs(0);
- read_from_px_regs_altbank(0);
- if(argc > 2)
- goto my_usage;
- printf("Setting registers VCFGNE1, VBOOT, and VCTL\n");
- set_altbank();
- read_from_px_regs_altbank(1);
- printf("Resetting board to boot from the other bank....\n");
- set_px_go();
- }
-
- default:
- goto my_usage;
- }
-
-my_usage:
- printf("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
- printf(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
- printf("For example: reset cf 40 2.5 10\n");
- printf("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
- return;
- } else
- out8(PIXIS_BASE+PIXIS_RST,0);
+ mpc8641_reset_board(cmdtp, flag, argc, argv);
#endif /* !CONFIG_MPC8641HPCN */