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authorZhao Chenhui <b35336@freescale.com>2011-01-27 19:02:47 +0800
committerKumar Gala <galak@kernel.crashing.org>2011-04-05 10:18:39 -0500
commit4aa8405c913b20be8105eb0a08e7d1fb7b92b9d1 (patch)
tree61490ea2a4eced339bd4c698a6d6d12d80842fad
parenta52d2f816dac9cf516b4c795d44ce42cbe6aacb3 (diff)
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powerpc/85xx: Add some defines & registers in immap_85xx.h
* Added SDHCDCR register to GUR struct * Added SDHCDCR_CD_INV define related to SDHCDCR * Added Pin Muxing define related to TDM on P102x Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 7beb6a7..5118fe0 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1923,6 +1923,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR_SD_DATA 0x80000000
#define MPC85xx_PMUXCR_SDHC_CD 0x40000000
#define MPC85xx_PMUXCR_SDHC_WP 0x20000000
+#define MPC85xx_PMUXCR_TDM_ENA 0x00800000
#define MPC85xx_PMUXCR_QE0 0x00008000
#define MPC85xx_PMUXCR_QE1 0x00004000
#define MPC85xx_PMUXCR_QE2 0x00002000
@@ -1998,10 +1999,14 @@ typedef struct ccsr_gur {
u32 ddrioovcr; /* DDR IO Override Control */
u32 tsec12ioovcr; /* eTSEC 1/2 IO override control */
u32 tsec34ioovcr; /* eTSEC 3/4 IO override control */
- u8 res16[61648];
+ u8 res16[52];
+ u32 sdhcdcr; /* SDHC debug control register */
+ u8 res17[61592];
} ccsr_gur_t;
#endif
+#define SDHCDCR_CD_INV 0x80000000 /* invert SDHC card detect */
+
typedef struct serdes_corenet {
struct {
u32 rstctl; /* Reset Control Register */