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authorAndre Renaud <andre@bluewatersys.com>2014-06-10 08:47:13 +1200
committerStefano Babic <sbabic@denx.de>2014-07-09 14:55:30 +0200
commit2eb268f6fd236a5ad9d51e7e47190d7994b3920f (patch)
tree75f6e2dd6e33b81b5b2da29a70514356cec6db3f
parent85d8a5fc98a65f7ba7ec5df08b0567d3ad9009dc (diff)
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MX6: Correct calculation of PLL_SYS
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by: Andre Renaud <andre@bluewatersys.com>
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index bd65a08..7dd83ec 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -80,7 +80,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq)
div = __raw_readl(&imx_ccm->analog_pll_sys);
div &= BM_ANADIG_PLL_SYS_DIV_SELECT;
- return infreq * (div >> 1);
+ return (infreq * div) >> 1;
case PLL_BUS:
div = __raw_readl(&imx_ccm->analog_pll_528);
div &= BM_ANADIG_PLL_528_DIV_SELECT;