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authorBo Shen <voice.shen@atmel.com>2013-11-15 11:12:32 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2013-12-01 22:38:39 +0100
commit184c551b8582fee6b685d513d026b44f558285b5 (patch)
treeb251558f177752a4a159e21a14f3d03117e4acb6
parent618bbbb2e9546aa602c97d55963e133c7e1a85ec (diff)
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arm: atmel: sama5d3: correct the ID for DBGU and PIT
As the DBGU and PIT has its own ID on sama5d3 SoC, while not share with SYS ID. So, correct them. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
-rw-r--r--arch/arm/cpu/armv7/at91/sama5d3_devices.c2
-rw-r--r--arch/arm/cpu/armv7/at91/timer.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
index 7ebee87..78ecfc8 100644
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -84,7 +84,7 @@ void at91_seriald_hw_init(void)
at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* DRXD */
/* Enable clock */
- at91_periph_clk_enable(ATMEL_ID_SYS);
+ at91_periph_clk_enable(ATMEL_ID_DBGU);
}
#if defined(CONFIG_ATMEL_SPI)
diff --git a/arch/arm/cpu/armv7/at91/timer.c b/arch/arm/cpu/armv7/at91/timer.c
index 3808aed..e3ebfe0 100644
--- a/arch/arm/cpu/armv7/at91/timer.c
+++ b/arch/arm/cpu/armv7/at91/timer.c
@@ -60,7 +60,7 @@ int timer_init(void)
at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
/* Enable PITC Clock */
- at91_periph_clk_enable(ATMEL_ID_SYS);
+ at91_periph_clk_enable(ATMEL_ID_PIT);
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);