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authorJagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com>2013-05-21 15:01:36 +0530
committerAndy Fleming <afleming@freescale.com>2013-06-13 16:44:49 -0500
commit1695b29a5daa1f792e62f4c637284c8c05ea577b (patch)
tree7e4ccd905d1269ef986ab81ac78b046e15984ebd
parent5707df7796f3d2791bdfaa29e682b1d3cc33f90e (diff)
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mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards
CAP register don't have any information for 8-bit buswidth support on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information. Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using mmc_set_bus_width even if controller doesn't support. Below change has code information. "mmc: Properly determine maximum supported bus width" (sha1: 7798f6dbd5e1a3030ed81a81da5dfb57c3307cac) Bug log: <mmc plus and emmc cards) ------- zynq-uboot> mmcinfo Error detected in status(0x208100)! Device: zynq_sdhci Manufacturer ID: fe ..... So enable 8-bit support only for 3.0 spec using CAP and for below 3.0 assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver if host have a support. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
-rw-r--r--drivers/mmc/sdhci.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1eaea04..c5631bf 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -486,8 +486,10 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
mmc->voltages |= host->voltages;
mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
- if (caps & SDHCI_CAN_DO_8BIT)
- mmc->host_caps |= MMC_MODE_8BIT;
+ if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) {
+ if (caps & SDHCI_CAN_DO_8BIT)
+ mmc->host_caps |= MMC_MODE_8BIT;
+ }
if (host->host_caps)
mmc->host_caps |= host->host_caps;