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author | Ye Li <ye.li@nxp.com> | 2016-03-04 10:10:44 +0800 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2016-03-04 16:09:02 +0800 |
commit | 13d2079a2d74797fe665ccf94109b06aaccf1b45 (patch) | |
tree | a296191383df38334b9d04414bca16c8138e0a6b | |
parent | 8c8da023f9c530254486cda4bccb3a45d0ae6e28 (diff) | |
download | u-boot-imx-13d2079a2d74797fe665ccf94109b06aaccf1b45.zip u-boot-imx-13d2079a2d74797fe665ccf94109b06aaccf1b45.tar.gz u-boot-imx-13d2079a2d74797fe665ccf94109b06aaccf1b45.tar.bz2 |
MLK-12492-1 mx6: fix type style problems introduced by patch MLK-12483
Some type style problems found by review-commits for previous patch
MLK-12483, fix them in this patch and re-check.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 8ada91778f7f28dd33b80f515a35d09c1398933c)
-rw-r--r-- | arch/arm/cpu/armv7/mx6/module_fuse.c | 140 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx6/module_fuse.h | 24 | ||||
-rw-r--r-- | board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c | 17 | ||||
-rw-r--r-- | board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 12 | ||||
-rw-r--r-- | drivers/dma/apbh_dma.c | 5 | ||||
-rw-r--r-- | drivers/i2c/mxc_i2c.c | 4 | ||||
-rw-r--r-- | drivers/spi/mxc_spi.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-mx6.c | 4 | ||||
-rw-r--r-- | drivers/video/mxsfb.c | 3 |
9 files changed, 106 insertions, 105 deletions
diff --git a/arch/arm/cpu/armv7/mx6/module_fuse.c b/arch/arm/cpu/armv7/mx6/module_fuse.c index 5f36fcf..a03f1d3 100644 --- a/arch/arm/cpu/armv7/mx6/module_fuse.c +++ b/arch/arm/cpu/armv7/mx6/module_fuse.c @@ -14,14 +14,14 @@ struct fuse_entry_desc { enum fuse_module_type module; - const char* node_path; + const char *node_path; u32 fuse_word_offset; u32 fuse_bit_offset; u32 status; }; static struct fuse_entry_desc mx6_fuse_descs[] = { -#ifdef CONFIG_MX6UL +#ifdef CONFIG_MX6UL {MX6_MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22}, {MX6_MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23}, {MX6_MODULE_SIM1, "/soc/aips-bus@02100000/sim@0218c000", 0x430, 24}, @@ -83,23 +83,22 @@ u32 check_module_fused(enum fuse_module_type module) void print_fuse_status() { u32 i, reg; - + for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) { reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset); - if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset)) { + if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset)) printf("%s, disabled\n", mx6_fuse_descs[i].node_path); - } } } void simulate_fuse() { u32 i, reg; - + for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) { if (MX6_MODULE_SD2 == mx6_fuse_descs[i].module) continue; - + reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset); reg |= (1 << mx6_fuse_descs[i].fuse_bit_offset); writel(reg, OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset); @@ -113,7 +112,7 @@ int ft_system_setup(void *blob, bd_t *bd) u32 i, reg; const char *status = "disabled"; int rc; - + for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) { reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset); if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset)) { @@ -147,67 +146,67 @@ add_status: u32 mx6_esdhc_fused(u32 base_addr) { switch (base_addr) { - case USDHC1_BASE_ADDR: - return check_module_fused(MX6_MODULE_SD1); - case USDHC2_BASE_ADDR: - return check_module_fused(MX6_MODULE_SD2); -#ifdef USDHC3_BASE_ADDR - case USDHC3_BASE_ADDR: - return check_module_fused(MX6_MODULE_SD3); + case USDHC1_BASE_ADDR: + return check_module_fused(MX6_MODULE_SD1); + case USDHC2_BASE_ADDR: + return check_module_fused(MX6_MODULE_SD2); +#ifdef USDHC3_BASE_ADDR + case USDHC3_BASE_ADDR: + return check_module_fused(MX6_MODULE_SD3); #endif -#ifdef USDHC4_BASE_ADDR - case USDHC4_BASE_ADDR: - return check_module_fused(MX6_MODULE_SD4); +#ifdef USDHC4_BASE_ADDR + case USDHC4_BASE_ADDR: + return check_module_fused(MX6_MODULE_SD4); #endif - default: - return 0; + default: + return 0; } } u32 mx6_ecspi_fused(u32 base_addr) { switch (base_addr) { - case ECSPI1_BASE_ADDR: - return check_module_fused(MX6_MODULE_ECSPI1); - case ECSPI2_BASE_ADDR: - return check_module_fused(MX6_MODULE_ECSPI2); - case ECSPI3_BASE_ADDR: - return check_module_fused(MX6_MODULE_ECSPI3); - case ECSPI4_BASE_ADDR: - return check_module_fused(MX6_MODULE_ECSPI4); + case ECSPI1_BASE_ADDR: + return check_module_fused(MX6_MODULE_ECSPI1); + case ECSPI2_BASE_ADDR: + return check_module_fused(MX6_MODULE_ECSPI2); + case ECSPI3_BASE_ADDR: + return check_module_fused(MX6_MODULE_ECSPI3); + case ECSPI4_BASE_ADDR: + return check_module_fused(MX6_MODULE_ECSPI4); #ifdef ECSPI5_BASE_ADDR - case ECSPI5_BASE_ADDR: - return check_module_fused(MX6_MODULE_ECSPI5); + case ECSPI5_BASE_ADDR: + return check_module_fused(MX6_MODULE_ECSPI5); #endif - default: - return 0; + default: + return 0; } } u32 mx6_uart_fused(u32 base_addr) { switch (base_addr) { - case UART1_BASE: - return check_module_fused(MX6_MODULE_UART1); - case UART2_BASE: - return check_module_fused(MX6_MODULE_UART2); - case UART3_BASE: - return check_module_fused(MX6_MODULE_UART3); - case UART4_BASE: - return check_module_fused(MX6_MODULE_UART4); - case UART5_BASE: - return check_module_fused(MX6_MODULE_UART5); + case UART1_BASE: + return check_module_fused(MX6_MODULE_UART1); + case UART2_BASE: + return check_module_fused(MX6_MODULE_UART2); + case UART3_BASE: + return check_module_fused(MX6_MODULE_UART3); + case UART4_BASE: + return check_module_fused(MX6_MODULE_UART4); + case UART5_BASE: + return check_module_fused(MX6_MODULE_UART5); #ifdef UART6_BASE_ADDR - case UART6_BASE_ADDR: - return check_module_fused(MX6_MODULE_UART6); + case UART6_BASE_ADDR: + return check_module_fused(MX6_MODULE_UART6); #endif #ifdef UART7_IPS_BASE_ADDR - case UART7_IPS_BASE_ADDR: - return check_module_fused(MX6_MODULE_UART7); + case UART7_IPS_BASE_ADDR: + return check_module_fused(MX6_MODULE_UART7); #endif #ifdef UART8_IPS_BASE_ADDR - case UART8_IPS_BASE_ADDR: - return check_module_fused(MX6_MODULE_UART8); + case UART8_IPS_BASE_ADDR: + return check_module_fused(MX6_MODULE_UART8); #endif } @@ -223,32 +222,32 @@ u32 mx6_usb_fused(u32 base_addr) u32 mx6_qspi_fused(u32 base_addr) { switch (base_addr) { -#ifdef QSPI1_BASE_ADDR - case QSPI1_BASE_ADDR: - return check_module_fused(MX6_MODULE_QSPI1); +#ifdef QSPI1_BASE_ADDR + case QSPI1_BASE_ADDR: + return check_module_fused(MX6_MODULE_QSPI1); #endif #ifdef QSPI2_BASE_ADDR - case QSPI2_BASE_ADDR: - return check_module_fused(MX6_MODULE_QSPI2); + case QSPI2_BASE_ADDR: + return check_module_fused(MX6_MODULE_QSPI2); #endif - default: - return 0; + default: + return 0; } } u32 mx6_i2c_fused(u32 base_addr) { switch (base_addr) { - case I2C1_BASE_ADDR: - return check_module_fused(MX6_MODULE_I2C1); - case I2C2_BASE_ADDR: - return check_module_fused(MX6_MODULE_I2C2); - case I2C3_BASE_ADDR: - return check_module_fused(MX6_MODULE_I2C3); -#ifdef I2C4_BASE_ADDR - case I2C4_BASE_ADDR: - return check_module_fused(MX6_MODULE_I2C4); + case I2C1_BASE_ADDR: + return check_module_fused(MX6_MODULE_I2C1); + case I2C2_BASE_ADDR: + return check_module_fused(MX6_MODULE_I2C2); + case I2C3_BASE_ADDR: + return check_module_fused(MX6_MODULE_I2C3); +#ifdef I2C4_BASE_ADDR + case I2C4_BASE_ADDR: + return check_module_fused(MX6_MODULE_I2C4); #endif } @@ -258,14 +257,13 @@ u32 mx6_i2c_fused(u32 base_addr) u32 mx6_enet_fused(u32 base_addr) { switch (base_addr) { - case ENET_BASE_ADDR: - return check_module_fused(MX6_MODULE_ENET1); + case ENET_BASE_ADDR: + return check_module_fused(MX6_MODULE_ENET1); #ifdef ENET2_BASE_ADDR - case ENET2_BASE_ADDR: - return check_module_fused(MX6_MODULE_ENET2); + case ENET2_BASE_ADDR: + return check_module_fused(MX6_MODULE_ENET2); #endif - default: - return 0; + default: + return 0; } } - diff --git a/arch/arm/include/asm/arch-mx6/module_fuse.h b/arch/arm/include/asm/arch-mx6/module_fuse.h index 01a945c..9777a94 100644 --- a/arch/arm/include/asm/arch-mx6/module_fuse.h +++ b/arch/arm/include/asm/arch-mx6/module_fuse.h @@ -66,30 +66,38 @@ enum fuse_module_type{ }; #if !defined(CONFIG_MODULE_FUSE) -static inline u32 check_module_fused(enum fuse_module_type module) { +static inline u32 check_module_fused(enum fuse_module_type module) +{ return 0; }; -static inline u32 mx6_esdhc_fused(u32 base_addr) { +static inline u32 mx6_esdhc_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_ecspi_fused(u32 base_addr){ +static inline u32 mx6_ecspi_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_uart_fused(u32 base_addr){ +static inline u32 mx6_uart_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_usb_fused(u32 base_addr){ +static inline u32 mx6_usb_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_qspi_fused(u32 base_addr){ +static inline u32 mx6_qspi_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_i2c_fused(u32 base_addr){ +static inline u32 mx6_i2c_fused(u32 base_addr) +{ return 0; }; -static inline u32 mx6_enet_fused(u32 base_addr){ +static inline u32 mx6_enet_fused(u32 base_addr) +{ return 0; }; diff --git a/board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c b/board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c index 765d5cc..c2de966 100644 --- a/board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c +++ b/board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c @@ -351,9 +351,8 @@ static void setup_eimnor(void) int board_flash_wp_on(void) { - if (check_module_fused(MX6_MODULE_EIM)) { + if (check_module_fused(MX6_MODULE_EIM)) return 1; /* Skip flash init */ - } return 0; } @@ -514,7 +513,7 @@ int mmc_map_to_kernel_blk(int dev_no) { if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR)) dev_no = 1; - + return dev_no; } @@ -553,7 +552,7 @@ int board_mmc_init(bd_t *bis) */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { - case 0: + case 0: #ifdef CONFIG_MX6UL_DDR3_ARM2_EMMC_REWORK imx_iomux_v3_setup_multiple_pads( usdhc1_emmc_pads, ARRAY_SIZE(usdhc1_emmc_pads)); @@ -756,10 +755,9 @@ static int setup_fec(int fec_id) int ret; if (0 == fec_id) { - if (check_module_fused(MX6_MODULE_ENET1)) { + if (check_module_fused(MX6_MODULE_ENET1)) return -1; - } - + /* * Use 50M anatop loopback REF_CLK1 for ENET1, * clear gpr1[13], set gpr1[17] @@ -771,10 +769,9 @@ static int setup_fec(int fec_id) return ret; } else { - if (check_module_fused(MX6_MODULE_ENET2)) { + if (check_module_fused(MX6_MODULE_ENET2)) return -1; - } - + /* clk from phy, set gpr1[14], clear gpr1[18]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK); diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 01f5699..c09e2ae 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -498,7 +498,7 @@ int mmc_map_to_kernel_blk(int dev_no) { if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR)) dev_no = 1; - + return dev_no; } @@ -755,18 +755,16 @@ static int setup_fec(int fec_id) int ret; if (0 == fec_id) { - if (check_module_fused(MX6_MODULE_ENET1)) { + if (check_module_fused(MX6_MODULE_ENET1)) return -1; - } - + /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); } else { - if (check_module_fused(MX6_MODULE_ENET2)) { + if (check_module_fused(MX6_MODULE_ENET2)) return -1; - } - + /* Use 50M anatop loopback REF_CLK2 for ENET2, clear gpr1[14], set gpr1[18]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index d5c9a7f..a755dee 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -128,7 +128,7 @@ static int mxs_dma_enable(int channel) if (list_empty(&pchan->active)) return -EFAULT; - + pdesc = list_first_entry(&pchan->active, struct mxs_dma_desc, node); if (pchan->flags & MXS_DMA_FLAGS_BUSY) { if (!(pdesc->cmd.data & MXS_DMA_DESC_CHAIN)) @@ -576,7 +576,8 @@ void mxs_dma_init(void) #ifdef CONFIG_MX6 if (check_module_fused(MX6_MODULE_APBHDMA)) { - printf("NAND APBH-DMA@0x%x is fused, disable it\n", MXS_APBH_BASE); + printf("NAND APBH-DMA@0x%x is fused, disable it\n", + MXS_APBH_BASE); return; } #endif diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index b77caac..3fb89d1 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -526,10 +526,10 @@ void bus_i2c_init(void *base, int speed, int unused, struct i2c_parms *p = srdata->i2c_data; if (!base) return; - + #ifdef CONFIG_MX6 if (mx6_i2c_fused((u32)base)) { - printf("I2C@0x%x is fused, disable it\n", + printf("I2C@0x%x is fused, disable it\n", (u32)base); return; } diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index c061145..7d84865 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -414,7 +414,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, return NULL; } - if (mx6_ecspi_fused(spi_bases[bus])){ + if (mx6_ecspi_fused(spi_bases[bus])) { printf("ECSPI@0x%lx is fused, disable it\n", spi_bases[bus]); return NULL; } diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 3ec16ec..7fa8b22 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -237,11 +237,11 @@ int ehci_hcd_init(int index, enum usb_init_type init, return -EINVAL; if (mx6_usb_fused(USB_BASE_ADDR + (0x200 * index))) { - printf("USB@0x%x is fused, disable it\n", + printf("USB@0x%x is fused, disable it\n", USB_BASE_ADDR + (0x200 * index)); return -2; } - + enable_usboh3_clk(1); mdelay(1); diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 270a31a..05e5fbb 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -171,9 +171,8 @@ void lcdif_power_down() int timeout = WAIT_FOR_VSYNC_TIMEOUT; #ifdef CONFIG_MX6 - if (check_module_fused(MX6_MODULE_LCDIF)) { + if (check_module_fused(MX6_MODULE_LCDIF)) return; - } #endif writel(panel.frameAdrs, ®s->hw_lcdif_cur_buf); writel(panel.frameAdrs, ®s->hw_lcdif_next_buf); |