Merge branch 'master' of git://git.denx.de/u-boot-i2c

4 files changed, 77 insertions, 4 deletions

diff --git a/README b/README
index c90f6ee..ff4ed8b 100644
--- a/README
+++ b/README
@@ -1366,6 +1366,13 @@ The following options need to be configured:
 		therefore be cleared to 0 (See, eg, MPC823e User's Manual
 		p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0.
 
+		CONFIG_SYS_I2C_INIT_MPC5XXX
+
+		When a board is reset during an i2c bus transfer
+		chips might think that the current transfer is still
+		in progress.  Reset the slave devices by sending start
+		commands until the slave device responds.
+
 		That's all that's required for CONFIG_HARD_I2C.
 
 		If you use the software i2c interface (CONFIG_SOFT_I2C)
diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index 2341932..4f7f716 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -207,6 +207,52 @@ static int receive_bytes(uchar chip, char *buf, int len)
 	return 0;
 }
 
+#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
+
+#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
+#define FDR432(x) (u8) ((x & 0x1C) >> 2)
+/*
+ * Reset any i2c devices that may have been interrupted during a system reset.
+ * Normally this would be accomplished by clocking the line until SCL and SDA
+ * are released and then sending a start condtiion (From an Atmel datasheet).
+ * There is no direct access to the i2c pins so instead create start commands
+ * through the i2c interface.  Send a start command then delay for the SDA Hold
+ * time, repeat this by disabling/enabling the bus a total of 9 times.
+ */
+static void send_reset(void)
+{
+	struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
+	int i;
+	u32 delay;
+	u8 fdr;
+	int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
+	struct mpc5xxx_i2c_tap scltap[] = {
+		{4, 1},
+		{4, 2},
+		{6, 4},
+		{6, 8},
+		{14, 16},
+		{30, 32},
+		{62, 64},
+		{126, 128}
+	};
+
+	fdr = (u8)mpc_reg_in(&regs->mfdr);
+
+	delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
+		scltap[FDR432(fdr)].tap2tap) + 3;
+
+	for (i = 0; i < 9; i++) {
+		mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
+		udelay(delay);
+		mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
+		udelay(delay);
+	}
+
+	mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
+}
+#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
+
 /**************** I2C API ****************/
 
 void i2c_init(int speed, int saddr)
@@ -225,6 +271,9 @@ void i2c_init(int speed, int saddr)
 	mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
 	mpc_reg_out(&regs->msr, 0, I2C_IF);
 
+#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
+	send_reset();
+#endif
 	return;
 }
 
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index ce0f301..47bbf79 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006 Freescale Semiconductor, Inc.
+ * Copyright 2006,2009 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -26,7 +26,21 @@
 #include <asm/io.h>
 #include <asm/fsl_i2c.h>	/* HW definitions */
 
-#define I2C_TIMEOUT	(CONFIG_SYS_HZ / 4)
+/* The maximum number of microseconds we will wait until another master has
+ * released the bus.  If not defined in the board header file, then use a
+ * generic value.
+ */
+#ifndef CONFIG_I2C_MBB_TIMEOUT
+#define CONFIG_I2C_MBB_TIMEOUT	100000
+#endif
+
+/* The maximum number of microseconds we will wait for a read or write
+ * operation to complete.  If not defined in the board header file, then use a
+ * generic value.
+ */
+#ifndef CONFIG_I2C_TIMEOUT
+#define CONFIG_I2C_TIMEOUT	10000
+#endif
 
 #define I2C_READ_BIT  1
 #define I2C_WRITE_BIT 0
@@ -213,9 +227,10 @@ static __inline__ int
 i2c_wait4bus(void)
 {
 	unsigned long long timeval = get_ticks();
+	const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
 
 	while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
-		if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT))
+		if ((get_ticks() - timeval) > timeout)
 			return -1;
 	}
 
@@ -227,6 +242,7 @@ i2c_wait(int write)
 {
 	u32 csr;
 	unsigned long long timeval = get_ticks();
+	const unsigned long long timeout = usec2ticks(CONFIG_I2C_TIMEOUT);
 
 	do {
 		csr = readb(&i2c_dev[i2c_bus_num]->sr);
@@ -251,7 +267,7 @@ i2c_wait(int write)
 		}
 
 		return 0;
-	} while ((get_ticks() - timeval) < usec2ticks(I2C_TIMEOUT));
+	} while ((get_ticks() - timeval) < timeout);
 
 	debug("i2c_wait: timed out\n");
 	return -1;
diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h
index a5b5a03..f4b520d 100644
--- a/include/configs/galaxy5200.h
+++ b/include/configs/galaxy5200.h
@@ -110,6 +110,7 @@
 #define CONFIG_SYS_I2C_MODULE 2		/* Select I2C module #1 or #2 */
 #define CONFIG_SYS_I2C_SPEED 100000	/* 100 kHz */
 #define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_INIT_MPC5XXX	/* Reset devices on i2c bus */
 
 /*
  * EEPROM CAT24WC32 configuration