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author | Stefano Babic <sbabic@denx.de> | 2011-08-21 10:52:04 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:11 +0200 |
commit | 729b74add90f5964b19e76f1de378d372007768e (patch) | |
tree | a5f5252ddb1aaa6de3f85a7a8c2df94c10d56765 | |
parent | 7d8d0b1a4a7a679e4148a4e64d755321edc58f3e (diff) | |
download | u-boot-imx-729b74add90f5964b19e76f1de378d372007768e.zip u-boot-imx-729b74add90f5964b19e76f1de378d372007768e.tar.gz u-boot-imx-729b74add90f5964b19e76f1de378d372007768e.tar.bz2 |
MX35: make use of GPIO framework for MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | arch/arm/include/asm/arch-mx35/gpio.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx35/gpio.h b/arch/arm/include/asm/arch-mx35/gpio.h new file mode 100644 index 0000000..7bcc3e8 --- /dev/null +++ b/arch/arm/include/asm/arch-mx35/gpio.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __ASM_ARCH_MX35_GPIO_H +#define __ASM_ARCH_MX35_GPIO_H + +/* GPIO registers */ +struct gpio_regs { + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ + u32 psr; /* pad satus */ + u32 icr1; /* interrupt config 1 */ + u32 icr2; /* interrupt config 2 */ + u32 imr; /* interrupt mask */ + u32 isr; /* interrupt status */ + u32 edge_sel; /* edge select */ +}; + +#endif |