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| author | Marek Vasut <marex@denx.de> | 2014-09-15 03:58:22 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-10-06 17:46:50 +0200 |
| commit | 60d804c2f3ddd0071348c6e65999e19b4d07d16a (patch) | |
| tree | 0dd1b2b0104af2a273a6cb0fae0c158f5ae2955c | |
| parent | 7056efcc32081256af6172611874709c780f2007 (diff) | |
| download | u-boot-imx-60d804c2f3ddd0071348c6e65999e19b4d07d16a.zip u-boot-imx-60d804c2f3ddd0071348c6e65999e19b4d07d16a.tar.gz u-boot-imx-60d804c2f3ddd0071348c6e65999e19b4d07d16a.tar.bz2 | |
arm: socfpga: pl310: Map SDRAM to 0x0
Configure the PL310 address filter to make sure DRAM is mapped to 0x0.
This code also configures the "remap" register of NIC-301 and sets the
required 'mpuzero' bit.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
| -rw-r--r-- | arch/arm/cpu/armv7/socfpga/misc.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index b07d97e..0fc26c2 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -12,11 +12,17 @@ #include <asm/arch/reset_manager.h> #include <asm/arch/system_manager.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/nic301.h> +#include <asm/pl310.h> DECLARE_GLOBAL_DATA_PTR; +static struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; static struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; +static struct nic301_registers *nic301_regs = + (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; int dram_init(void) { @@ -142,6 +148,14 @@ int arch_cpu_init(void) int misc_init_r(void) { + /* Configure the L2 controller to make SDRAM start at 0 */ +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET + writel(0x2, &nic301_regs->remap); +#else + writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ + writel(0x1, &pl310->pl310_addr_filter_start); +#endif + /* Add device descriptor to FPGA device table */ socfpga_fpga_add(); return 0; |