powerpc: hiddendragon: remove orphan board

This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)

Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>

8 files changed, 1 insertions, 1096 deletions

diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index edd7375..a5e7a61 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1346,26 +1346,14 @@ void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 #if defined(CONFIG_8xx)
 #define _machine _MACH_8xx
 #define have_of 0
-#elif defined(CONFIG_OAK)
-#define _machine _MACH_oak
-#define have_of	0
 #elif defined(CONFIG_WALNUT)
 #define _machine _MACH_walnut
 #define have_of 0
-#elif defined(CONFIG_APUS)
-#define _machine _MACH_apus
-#define have_of 0
-#elif defined(CONFIG_GEMINI)
-#define _machine _MACH_gemini
-#define have_of 0
 #elif defined(CONFIG_MPC8260)
 #define _machine _MACH_8260
 #define have_of 0
 #elif defined(CONFIG_SANDPOINT)
 #define _machine _MACH_sandpoint
-#elif defined(CONFIG_HIDDEN_DRAGON)
-#define _machine _MACH_hidden_dragon
-#define have_of 0
 #else
 #error "Machine not defined correctly"
 #endif
diff --git a/board/hidden_dragon/Makefile b/board/hidden_dragon/Makefile
deleted file mode 100644
index eb1c5fd..0000000
--- a/board/hidden_dragon/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y =  hidden_dragon.o flash.o
diff --git a/board/hidden_dragon/README b/board/hidden_dragon/README
deleted file mode 100644
index 529fe2b..0000000
--- a/board/hidden_dragon/README
+++ /dev/null
@@ -1,60 +0,0 @@
-U-Boot for Hidden Dragon board
-------------------------------
-
-Hidden Dragon is a MPC824x-based board by Motorola. For the most
-part it is similar to Sandpoint8245 board. So unless otherwise
-mentioned, the codes in this directory are adapted from ../sandpoint
-directory.
-
-Apparently there are very few of this board out there. Even Motorola
-website does not have any info on it.
-
-RAM:
-  start = 0x0000 0000
-  size	= 0x0200 0000 (32 MB)
-
-Flash:
-  BANK ONE:
-    start = 0xFFE0 0000
-    size  = 0x0020 0000 (2 MB)
-    flash chip = 29LV160TE (1x16 Mbits or 2x8 Mbits)
-    flash sectors = 16K, 2x8K, 32K, 31x64K
-
-  BANK TWO:
-    NONE
-
-The processor interrupt vectors reside on the first 256 bytes
-starting from address 0xFFF00000. The "reset vector" (first
-instruction executed after reset) is located on 0xFFF0 0100.
-
-U-Boot is configured to reside in flash starting at the address of
-0xFFF00000. The environment space is located in flash separately from
-U-Boot, at the second sector of the first flash bank, starting from
-0xFFE04000 until 0xFFE06000 (8KB).
-
-Network:
-  - RTL8139 chip on the base board	  (SUPPORTED)
-  - RTL8129 chip on the processor board	  (NOT SUPPORTED)
-
-Serial:
-  - Two NS16550 compatible UART on the processor board	(SUPPORTED)
-  - One NS16550 compatible UART on the base board	(UNTESTED)
-
-Misc:
-  VIA686A PCI SuperIO peripheral controller
-  - 2 USB ports		    (UNTESTED)
-  - 2 PS2 ports		    (UNTESTED)
-  - Parallel port	    (UNTESTED)
-  - IDE & floppy interface  (UNTESTED)
-
-  S3 Savage4 video card	    (UNTESTED)
-
-TODO:
------
-- Support for the VIA686A based peripherals
-- The RTL8139 driver frequently gives rx error.
-- Support for RTL8129 network controller. (Why is the support removed from
-  rtl8139.c driver?)
-
-(C) Copyright 2004
-Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
diff --git a/board/hidden_dragon/flash.c b/board/hidden_dragon/flash.c
deleted file mode 100644
index fc91a03..0000000
--- a/board/hidden_dragon/flash.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/*
- * (C) Copyright 2004
- * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
- *
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-#include <w83c553f.h>
-
-#define ROM_CS0_START	0xFF800000
-#define ROM_CS1_START	0xFF000000
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips    */
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-# ifndef  CONFIG_ENV_ADDR
-#  define CONFIG_ENV_ADDR  (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-# endif
-# ifndef  CONFIG_ENV_SIZE
-#  define CONFIG_ENV_SIZE  CONFIG_ENV_SECT_SIZE
-# endif
-# ifndef  CONFIG_ENV_SECT_SIZE
-#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0		(0xAAA)
-#define ADDR1		(0x555)
-#define ADDR3		(0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
-	__attribute__ ((const));
-
-typedef struct {
-	FLASH_WORD_SIZE extval;
-	unsigned short intval;
-} map_entry;
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
-{
-	static const map_entry mfct_map[] = {
-		{(FLASH_WORD_SIZE) AMD_MANUFACT,
-		 (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
-		{(FLASH_WORD_SIZE) FUJ_MANUFACT,
-		 (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
-		{(FLASH_WORD_SIZE) STM_MANUFACT,
-		 (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
-		{(FLASH_WORD_SIZE) MT_MANUFACT,
-		 (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
-		{(FLASH_WORD_SIZE) INTEL_MANUFACT,
-		 (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
-		{(FLASH_WORD_SIZE) INTEL_ALT_MANU,
-		 (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
-	};
-
-	static const map_entry chip_map[] = {
-		{AMD_ID_F040B, FLASH_AM040},
-		{(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
-	};
-
-	const map_entry *p;
-	unsigned long result = FLASH_UNKNOWN;
-
-	/* find chip id */
-	for (p = &chip_map[0];
-	     p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
-		if (p->extval == chip) {
-			result = FLASH_VENDMASK | p->intval;
-			break;
-		}
-
-	/* find vendor id */
-	for (p = &mfct_map[0];
-	     p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
-		if (p->extval == mfct) {
-			result &= ~FLASH_VENDMASK;
-			result |= (unsigned long) p->intval << 16;
-			break;
-		}
-
-	return result;
-}
-
-unsigned long flash_init (void)
-{
-	unsigned long i;
-	unsigned char j;
-	static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
-
-	/* Init: no FLASHes known */
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-		flash_info_t *const pflinfo = &flash_info[i];
-
-		pflinfo->flash_id = FLASH_UNKNOWN;
-		pflinfo->size = 0;
-		pflinfo->sector_count = 0;
-	}
-
-	/* Enable writes to Hidden Dragon flash */
-	{
-		register unsigned char temp;
-
-		CONFIG_READ_BYTE (CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
-				  temp);
-		temp &= ~0x20;	/* clear BIOSWP bit */
-		CONFIG_WRITE_BYTE (CONFIG_SYS_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
-				   temp);
-	}
-
-	for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) {
-		flash_info_t *const pflinfo = &flash_info[i];
-		const unsigned long base_address = flash_banks[i];
-		volatile FLASH_WORD_SIZE *const flash =
-			(FLASH_WORD_SIZE *) base_address;
-
-		flash[0xAAA << (3 * i)] = 0xaa;
-		flash[0x555 << (3 * i)] = 0x55;
-		flash[0xAAA << (3 * i)] = 0x90;
-		__asm__ __volatile__ ("sync");
-
-		pflinfo->flash_id =
-			flash_id (flash[0x0], flash[0x2 + 14 * i]);
-
-		switch (pflinfo->flash_id & FLASH_TYPEMASK) {
-		case FLASH_AM040:
-			pflinfo->size = 0x00080000;
-			pflinfo->sector_count = 8;
-			for (j = 0; j < 8; j++) {
-				pflinfo->start[j] =
-					base_address + 0x00010000 * j;
-				pflinfo->protect[j] = flash[(j << 16) | 0x2];
-			}
-			break;
-		case FLASH_STM800AB:
-			pflinfo->size = 0x00100000;
-			pflinfo->sector_count = 19;
-			pflinfo->start[0] = base_address;
-			pflinfo->start[1] = base_address + 0x4000;
-			pflinfo->start[2] = base_address + 0x6000;
-			pflinfo->start[3] = base_address + 0x8000;
-			for (j = 1; j < 16; j++) {
-				pflinfo->start[j + 3] =
-					base_address + 0x00010000 * j;
-			}
-			break;
-		default:
-			/* The chip used is not listed in flash_id
-			   TODO: Change this to explicitly detect the flash type
-			 */
-			{
-				int sector_addr = base_address;
-
-				pflinfo->size = 0x00200000;
-				pflinfo->sector_count = 35;
-				pflinfo->start[0] = sector_addr;
-				sector_addr += 0x4000;	/* 16K */
-				pflinfo->start[1] = sector_addr;
-				sector_addr += 0x2000;	/* 8K */
-				pflinfo->start[2] = sector_addr;
-				sector_addr += 0x2000;	/* 8K */
-				pflinfo->start[3] = sector_addr;
-				sector_addr += 0x8000;	/* 32K */
-
-				for (j = 4; j < 35; j++) {
-					pflinfo->start[j] = sector_addr;
-					sector_addr += 0x10000;	/* 64K */
-				}
-			}
-			break;
-		}
-		/* Protect monitor and environment sectors
-		 */
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-		flash_protect (FLAG_PROTECT_SET,
-			       CONFIG_SYS_MONITOR_BASE,
-			       CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-			       &flash_info[0]);
-#endif
-
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
-		flash_protect (FLAG_PROTECT_SET,
-			       CONFIG_ENV_ADDR,
-			       CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
-			       &flash_info[0]);
-#endif
-
-		/* reset device to read mode */
-		flash[0x0000] = 0xf0;
-		__asm__ __volatile__ ("sync");
-	}
-
-	/* only have 1 bank */
-	return flash_info[0].size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
-	static const char unk[] = "Unknown";
-	const char *mfct = unk, *type = unk;
-	unsigned int i;
-
-	if (info->flash_id != FLASH_UNKNOWN) {
-		switch (info->flash_id & FLASH_VENDMASK) {
-		case FLASH_MAN_AMD:
-			mfct = "AMD";
-			break;
-		case FLASH_MAN_FUJ:
-			mfct = "FUJITSU";
-			break;
-		case FLASH_MAN_STM:
-			mfct = "STM";
-			break;
-		case FLASH_MAN_SST:
-			mfct = "SST";
-			break;
-		case FLASH_MAN_BM:
-			mfct = "Bright Microelectonics";
-			break;
-		case FLASH_MAN_INTEL:
-			mfct = "Intel";
-			break;
-		}
-
-		switch (info->flash_id & FLASH_TYPEMASK) {
-		case FLASH_AM040:
-			type = "AM29F040B (512K * 8, uniform sector size)";
-			break;
-		case FLASH_AM400B:
-			type = "AM29LV400B (4 Mbit, bottom boot sect)";
-			break;
-		case FLASH_AM400T:
-			type = "AM29LV400T (4 Mbit, top boot sector)";
-			break;
-		case FLASH_AM800B:
-			type = "AM29LV800B (8 Mbit, bottom boot sect)";
-			break;
-		case FLASH_AM800T:
-			type = "AM29LV800T (8 Mbit, top boot sector)";
-			break;
-		case FLASH_AM160T:
-			type = "AM29LV160T (16 Mbit, top boot sector)";
-			break;
-		case FLASH_AM320B:
-			type = "AM29LV320B (32 Mbit, bottom boot sect)";
-			break;
-		case FLASH_AM320T:
-			type = "AM29LV320T (32 Mbit, top boot sector)";
-			break;
-		case FLASH_STM800AB:
-			type = "M29W800AB (8 Mbit, bottom boot sect)";
-			break;
-		case FLASH_SST800A:
-			type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
-			break;
-		case FLASH_SST160A:
-			type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
-			break;
-		}
-	}
-
-	printf ("\n  Brand: %s Type: %s\n"
-		"  Size: %lu KB in %d Sectors\n",
-		mfct, type, info->size >> 10, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-
-	for (i = 0; i < info->sector_count; i++) {
-		unsigned long size;
-		unsigned int erased;
-		unsigned long *flash = (unsigned long *) info->start[i];
-
-		/*
-		 * Check if whole sector is erased
-		 */
-		size = (i != (info->sector_count - 1)) ?
-			(info->start[i + 1] - info->start[i]) >> 2 :
-			(info->start[0] + info->size - info->start[i]) >> 2;
-
-		for (flash = (unsigned long *) info->start[i], erased = 1;
-		     (flash != (unsigned long *) info->start[i] + size)
-		     && erased; flash++)
-			erased = *flash == ~0x0UL;
-
-		printf ("%s %08lX %s %s",
-			(i % 5) ? "" : "\n   ",
-			info->start[i],
-			erased ? "E" : " ", info->protect[i] ? "RO" : "  ");
-	}
-
-	puts ("\n");
-	return;
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
-	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
-	int flag, prot, sect, l_sect;
-	ulong start, now, last;
-	unsigned char sh8b;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("- missing\n");
-		} else {
-			printf ("- no sectors to erase\n");
-		}
-		return 1;
-	}
-
-	if ((info->flash_id == FLASH_UNKNOWN) ||
-	    (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
-		printf ("Can't erase unknown flash type - aborted\n");
-		return 1;
-	}
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-	} else {
-		printf ("\n");
-	}
-
-	l_sect = -1;
-
-	/* Check the ROM CS */
-	if ((info->start[0] >= ROM_CS1_START)
-	    && (info->start[0] < ROM_CS0_START))
-		sh8b = 3;
-	else
-		sh8b = 0;
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
-	addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-	addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
-	addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
-	addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect <= s_last; sect++) {
-		if (info->protect[sect] == 0) {	/* not protected */
-			addr = (FLASH_WORD_SIZE *) (info->start[0] +
-						    ((info->start[sect] -
-						      info->start[0]) << sh8b));
-			if (info->flash_id & FLASH_MAN_SST) {
-				addr[ADDR0 << sh8b] =
-					(FLASH_WORD_SIZE) 0x00AA00AA;
-				addr[ADDR1 << sh8b] =
-					(FLASH_WORD_SIZE) 0x00550055;
-				addr[ADDR0 << sh8b] =
-					(FLASH_WORD_SIZE) 0x00800080;
-				addr[ADDR0 << sh8b] =
-					(FLASH_WORD_SIZE) 0x00AA00AA;
-				addr[ADDR1 << sh8b] =
-					(FLASH_WORD_SIZE) 0x00550055;
-				addr[0] = (FLASH_WORD_SIZE) 0x00500050;	/* block erase */
-				udelay (30000);	/* wait 30 ms */
-			} else
-				addr[0] = (FLASH_WORD_SIZE) 0x00300030;	/* sector erase */
-			l_sect = sect;
-		}
-	}
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts ();
-
-	/* wait at least 80us - let's wait 1 ms */
-	udelay (1000);
-
-	/*
-	 * We wait for the last triggered sector
-	 */
-	if (l_sect < 0)
-		goto DONE;
-
-	start = get_timer (0);
-	last = start;
-	addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
-						       info->
-						       start[0]) << sh8b));
-	while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
-	       (FLASH_WORD_SIZE) 0x00800080) {
-		if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-			printf ("Timeout\n");
-			return 1;
-		}
-		/* show that we're waiting */
-		if ((now - last) > 1000) {	/* every second */
-			serial_putc ('.');
-			last = now;
-		}
-	}
-
-      DONE:
-	/* reset to read mode */
-	addr = (FLASH_WORD_SIZE *) info->start[0];
-	addr[0] = (FLASH_WORD_SIZE) 0x00F000F0;	/* reset bank */
-
-	printf (" done\n");
-	return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-	ulong cp, wp, data;
-	int i, l, rc;
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i = 0, cp = wp; i < l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-		for (; i < 4 && cnt > 0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt == 0 && i < 4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-		data = 0;
-		for (i = 0; i < 4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i < 4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *) cp);
-	}
-
-	return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
-	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
-	volatile FLASH_WORD_SIZE *dest2;
-	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
-	ulong start;
-	int flag;
-	int i;
-	unsigned char sh8b;
-
-	/* Check the ROM CS */
-	if ((info->start[0] >= ROM_CS1_START)
-	    && (info->start[0] < ROM_CS0_START))
-		sh8b = 3;
-	else
-		sh8b = 0;
-
-	dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
-				     info->start[0]);
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
-		return (2);
-	}
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
-		addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
-		addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-		addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
-
-		dest2[i << sh8b] = data2[i];
-
-		/* re-enable interrupts if necessary */
-		if (flag)
-			enable_interrupts ();
-
-		/* data polling for D7 */
-		start = get_timer (0);
-		while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
-		       (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-				return (1);
-			}
-		}
-	}
-
-	return (0);
-}
diff --git a/board/hidden_dragon/hidden_dragon.c b/board/hidden_dragon/hidden_dragon.c
deleted file mode 100644
index 8d47f37..0000000
--- a/board/hidden_dragon/hidden_dragon.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2004
- * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
- *
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <netdev.h>
-
-int checkboard (void)
-{
-	/*TODO: Check processor type */
-
-	puts (	"Board: Hidden Dragon "
-#ifdef CONFIG_MPC8240
-		"8240"
-#endif
-#ifdef CONFIG_MPC8245
-		"8245"
-#endif
-		" ##Test not implemented yet##\n");
-	/* TODO: Implement board test */
-	return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
-	long size;
-	long new_bank0_end;
-	long mear1;
-	long emear1;
-
-	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
-
-	new_bank0_end = size - 1;
-	mear1 = mpc824x_mpc107_getreg(MEAR1);
-	emear1 = mpc824x_mpc107_getreg(EMEAR1);
-	mear1 = (mear1  & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
-	emear1 = (emear1 & 0xFFFFFF00) |
-		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
-	mpc824x_mpc107_setreg(MEAR1, mear1);
-	mpc824x_mpc107_setreg(EMEAR1, emear1);
-
-	return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_hidden_dragon_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
-				       PCI_ENET0_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
-				       PCI_ENET1_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
-	config_table: pci_hidden_dragon_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
-	pci_mpc824x_init(&hose);
-}
-
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
diff --git a/boards.cfg b/boards.cfg
index c5fca24..b8cfead 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1239,7 +1239,6 @@ Orphan  blackfin    blackfin       -           -               -
 Orphan  blackfin    blackfin       -           -               -                   tcm-bf537                             -                                                                                                                                 Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
 Orphan  powerpc     mpc5xxx        -           matrix_vision   mvbc_p              MVBC_P                                MVBC_P:MVBC_P                                                                                                                     Andre Schwarz <andre.schwarz@matrix-vision.de>
 Orphan  powerpc     mpc5xxx        -           matrix_vision   mvsmr               MVSMR                                 -                                                                                                                                 Andre Schwarz <andre.schwarz@matrix-vision.de>
-Orphan  powerpc     mpc824x        -           -               hidden_dragon       HIDDEN_DRAGON                         -                                                                                                                                 Yusdi Santoso <yusdi_santoso@adaptec.com>
 Orphan  powerpc     mpc83xx        -           freescale       mpc8360erdk         MPC8360ERDK                           -                                                                                                                                 Anton Vorontsov <avorontsov@ru.mvista.com>
 Orphan  powerpc     mpc83xx        -           freescale       mpc8360erdk         MPC8360ERDK_33                        MPC8360ERDK:CLKIN_33MHZ                                                                                                           Anton Vorontsov <avorontsov@ru.mvista.com>
 Orphan  powerpc     mpc83xx        -           matrix_vision   mergerbox           MERGERBOX                             -                                                                                                                                 Andre Schwarz <andre.schwarz@matrix-vision.de>
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index cbc373b..e2157e0 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+hidden_dragon    powerpc     mpc824x        -           -           Yusdi Santoso <yusdi_santoso@adaptec.com>
 debris           powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
 kvme080          powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
 ep8248           powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
deleted file mode 100644
index e0a233b..0000000
--- a/include/configs/HIDDEN_DRAGON.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/*
- * (C) Copyright 2004
- * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
- *
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC8245		1
-#define CONFIG_HIDDEN_DRAGON	1
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
-
-#if 0
-#define USE_DINK32		1
-#else
-#undef USE_DINK32
-#endif
-
-#define CONFIG_CONS_INDEX	3		/* set to '3' for on-chip DUART */
-#define CONFIG_BAUDRATE		9600
-#define CONFIG_DRAM_SPEED	100		/* MHz				*/
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		1		/* undef to save memory		*/
-#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size	*/
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-#define CONFIG_SYS_LOAD_ADDR		0x00100000	/* default load address		*/
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_PCI				/* include pci support		*/
-#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
-#undef CONFIG_PCI_PNP
-
-
-#define CONFIG_SYS_RX_ETH_BUFFER	8		/* use 8 rx buffer on eepro100	*/
-
-#define PCI_ENET0_IOADDR	0x80000000
-#define PCI_ENET0_MEMADDR	0x80000000
-#define PCI_ENET1_IOADDR	0x81000000
-#define PCI_ENET1_MEMADDR	0x81000000
-
-#define CONFIG_RTL8139
-
-/* Make sure the ethaddr can be overwritten
-   TODO: Remove this on final product
-*/
-#define CONFIG_ENV_OVERWRITE
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MAX_RAM_SIZE	0x02000000
-
-#define CONFIG_SYS_RESET_ADDRESS	0xFFF00100
-
-#if defined (USE_DINK32)
-#define CONFIG_SYS_MONITOR_LEN		0x00030000
-#define CONFIG_SYS_MONITOR_BASE	0x00090000
-#define CONFIG_SYS_RAMBOOT		1
-#define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-#else
-#undef	CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_MONITOR_LEN		0x00030000
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-
-
-#define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE      0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-#endif
-
-#define CONFIG_SYS_FLASH_BASE		0xFFE00000
-#define CONFIG_SYS_FLASH_SIZE		(2 * 1024 * 1024)	/* Unity has onboard 1MByte flash */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_OFFSET		0x00004000	/* Offset of Environment Sector */
-#define CONFIG_ENV_SIZE		0x00002000	/* Total Size of Environment Sector */
-
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 512 kB for malloc()	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END		0x02000000	/* 0 ... 32 MB in DRAM		*/
-
-#define CONFIG_SYS_EUMB_ADDR		0xFC000000
-
-#define CONFIG_SYS_ISA_MEM		0xFD000000
-#define CONFIG_SYS_ISA_IO		0xFE000000
-
-#define CONFIG_SYS_FLASH_RANGE_BASE	0xFFE00000	/* flash memory address range	*/
-#define CONFIG_SYS_FLASH_RANGE_SIZE	0x00200000
-#define FLASH_BASE0_PRELIM	0xFFE00000	/* processor board flash	*/
-
-/*
- * select i2c support configuration
- *
- * Supported configurations are {none, software, hardware} drivers.
- * If the software driver is chosen, there are some additional
- * configuration items that the driver uses to drive the port pins.
- */
-#define CONFIG_HARD_I2C		1		/* To enable I2C support	*/
-#undef	CONFIG_SYS_I2C_SOFT			/* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-#ifdef CONFIG_SYS_I2C_SOFT
-#error "Soft I2C is not configured properly.  Please review!"
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT_SPEED	50000
-#define CONFIG_SYS_I2C_SOFT_SLAVE	0xFE
-#define I2C_PORT		3		/* Port A=0, B=1, C=2, D=3 */
-#define I2C_ACTIVE		(iop->pdir |=  0x00010000)
-#define I2C_TRISTATE		(iop->pdir &= ~0x00010000)
-#define I2C_READ		((iop->pdat & 0x00010000) != 0)
-#define I2C_SDA(bit)		if(bit) iop->pdat |=  0x00010000; \
-				else	iop->pdat &= ~0x00010000
-#define I2C_SCL(bit)		if(bit) iop->pdat |=  0x00020000; \
-				else	iop->pdat &= ~0x00020000
-#define I2C_DELAY		udelay(5)	/* 1/4 I2C clock duration */
-#endif /* CONFIG_SYS_I2C_SOFT */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR	0x57		/* EEPROM IS24C02		*/
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1		/* Bytes of address		*/
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* and takes up to 10 msec */
-
-#define CONFIG_SYS_FLASH_BANKS		{ FLASH_BASE0_PRELIM }
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-
-/* #define CONFIG_WINBOND_83C553	1	/ *has a winbond bridge			*/
-#define CONFIG_SYS_USE_WINBOND_IDE	0	/*use winbond 83c553 internal IDE ctrlr */
-#define CONFIG_SYS_WINBOND_ISA_CFG_ADDR    0x80005800	/*pci-isa bridge config addr	*/
-#define CONFIG_SYS_WINBOND_IDE_CFG_ADDR    0x80005900	/*ide config addr		*/
-
-#define CONFIG_SYS_IDE_MAXBUS		2   /* max. 2 IDE busses	*/
-#define CONFIG_SYS_IDE_MAXDEVICE	(CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
-
-/* TODO: Change this to VIA686A */
-
-/*
- * NS87308 Configuration
- */
-#define CONFIG_NS87308			/* Nat Semi super-io controller on ISA bus */
-
-#define CONFIG_SYS_NS87308_BADDR_10	1
-
-#define CONFIG_SYS_NS87308_DEVS	( CONFIG_SYS_NS87308_UART1   | \
-				  CONFIG_SYS_NS87308_UART2   | \
-				  CONFIG_SYS_NS87308_POWRMAN | \
-				  CONFIG_SYS_NS87308_RTC_APC )
-
-#undef	CONFIG_SYS_NS87308_PS2MOD
-
-#define CONFIG_SYS_NS87308_CS0_BASE	0x0076
-#define CONFIG_SYS_NS87308_CS0_CONF	0x30
-#define CONFIG_SYS_NS87308_CS1_BASE	0x0075
-#define CONFIG_SYS_NS87308_CS1_CONF	0x30
-#define CONFIG_SYS_NS87308_CS2_BASE	0x0074
-#define CONFIG_SYS_NS87308_CS2_CONF	0x30
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-
-#define CONFIG_SYS_NS16550_REG_SIZE	1
-
-#if (CONFIG_CONS_INDEX > 2)
-#define CONFIG_SYS_NS16550_CLK		CONFIG_DRAM_SPEED*1000000
-#else
-#define CONFIG_SYS_NS16550_CLK		1843200
-#endif
-
-#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_UART1_BASE)
-#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_UART2_BASE)
-#define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_EUMB_ADDR + 0x4500)
-#define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_EUMB_ADDR + 0x4600)
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CONFIG_SYS_CLK_FREQ  33333333	/* external frequency to pll */
-
-#define CONFIG_SYS_ROMNAL		7	/*rom/flash next access time		*/
-#define CONFIG_SYS_ROMFAL		11	/*rom/flash access time			*/
-
-#define CONFIG_SYS_REFINT	430	/* no of clock cycles between CBR refresh cycles */
-
-/* the following are for SDRAM only*/
-#define CONFIG_SYS_BSTOPRE	121	/* Burst To Precharge, sets open page interval */
-#define CONFIG_SYS_REFREC		8	/* Refresh to activate interval		*/
-#define CONFIG_SYS_RDLAT		4	/* data latency from read command	*/
-#define CONFIG_SYS_PRETOACT		3	/* Precharge to activate interval	*/
-#define CONFIG_SYS_ACTTOPRE		5	/* Activate to Precharge interval	*/
-#define CONFIG_SYS_ACTORW		3	/* Activate to R/W			*/
-#define CONFIG_SYS_SDMODE_CAS_LAT	3	/* SDMODE CAS latency			*/
-#define CONFIG_SYS_SDMODE_WRAP		0	/* SDMODE wrap type			*/
-#if 0
-#define CONFIG_SYS_SDMODE_BURSTLEN	2	/* OBSOLETE!  SDMODE Burst length 2=4, 3=8		*/
-#endif
-
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER   1
-#define CONFIG_SYS_EXTROM 1
-#define CONFIG_SYS_REGDIMM 0
-
-
-/* memory bank settings*/
-/*
- * only bits 20-29 are actually used from these vales to set the
- * start/end address the upper two bits will be 0, and the lower 20
- * bits will be set to 0x00000 for a start address, or 0xfffff for an
- * end address
- */
-#define CONFIG_SYS_BANK0_START		0x00000000
-#define CONFIG_SYS_BANK0_END		(CONFIG_SYS_MAX_RAM_SIZE - 1)
-#define CONFIG_SYS_BANK0_ENABLE	1
-#define CONFIG_SYS_BANK1_START		0x3ff00000
-#define CONFIG_SYS_BANK1_END		0x3fffffff
-#define CONFIG_SYS_BANK1_ENABLE	0
-#define CONFIG_SYS_BANK2_START		0x3ff00000
-#define CONFIG_SYS_BANK2_END		0x3fffffff
-#define CONFIG_SYS_BANK2_ENABLE	0
-#define CONFIG_SYS_BANK3_START		0x3ff00000
-#define CONFIG_SYS_BANK3_END		0x3fffffff
-#define CONFIG_SYS_BANK3_ENABLE	0
-#define CONFIG_SYS_BANK4_START		0x00000000
-#define CONFIG_SYS_BANK4_END		0x00000000
-#define CONFIG_SYS_BANK4_ENABLE	0
-#define CONFIG_SYS_BANK5_START		0x00000000
-#define CONFIG_SYS_BANK5_END		0x00000000
-#define CONFIG_SYS_BANK5_ENABLE	0
-#define CONFIG_SYS_BANK6_START		0x00000000
-#define CONFIG_SYS_BANK6_END		0x00000000
-#define CONFIG_SYS_BANK6_ENABLE	0
-#define CONFIG_SYS_BANK7_START		0x00000000
-#define CONFIG_SYS_BANK7_END		0x00000000
-#define CONFIG_SYS_BANK7_ENABLE	0
-/*
- * Memory bank enable bitmask, specifying which of the banks defined above
- are actually present. MSB is for bank #7, LSB is for bank #0.
- */
-#define CONFIG_SYS_BANK_ENABLE		0x01
-
-#define CONFIG_SYS_ODCR		0xff	/* configures line driver impedances,	*/
-					/* see 8240 book for bit definitions	*/
-#define CONFIG_SYS_PGMAX		0x32	/* how long the 8240 retains the	*/
-					/* currently accessed page in memory	*/
-					/* see 8240 book for details		*/
-
-/* SDRAM 0 - 256MB */
-#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* stack in DCACHE @ 1GB (no backing mem) */
-#if defined(USE_DINK32)
-#define CONFIG_SYS_IBAT1L	(0x40000000 | BATL_PP_00 )
-#define CONFIG_SYS_IBAT1U	(0x40000000 | BATU_BL_128K )
-#else
-#define CONFIG_SYS_IBAT1L	(CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U	(CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-#endif
-
-/* PCI memory */
-#define CONFIG_SYS_IBAT2L	(0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U	(0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* Flash, config addrs, etc */
-#define CONFIG_SYS_IBAT3L	(0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L	CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U	CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L	CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U	CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L	CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U	CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L	CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U	CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	36	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8240 CPU			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/* values according to the manual */
-#define CONFIG_DRAM_50MHZ	1
-#define CONFIG_SDRAM_50MHZ
-
-#undef	NR_8259_INTS
-#define NR_8259_INTS		1
-
-#define CONFIG_DISK_SPINUP_TIME 1000000
-
-#endif	/* __CONFIG_H */