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authorRuchika Gupta <ruchika.gupta@freescale.com>2014-10-15 11:35:31 +0530
committerYork Sun <yorksun@freescale.com>2014-10-16 14:17:21 -0700
commit737537ef0c9622114cf1a48208abf048df1b2005 (patch)
tree9005cf1d30a8c370c36bdb05e1b4fb95496f62a3
parentb9eebfade974c86c8ddef64793649374c9876242 (diff)
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mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block. Hash command enabled along with hardware accelerated support for SHA-1 and SHA-256 for platforms which have CAAM block. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat
-rw-r--r--include/configs/B4860QDS.h7
-rw-r--r--include/configs/BSC9131RDB.h7
-rw-r--r--include/configs/BSC9132QDS.h7
-rw-r--r--include/configs/C29XPCIE.h7
-rw-r--r--include/configs/P1010RDB.h7
-rw-r--r--include/configs/P2041RDB.h7
-rw-r--r--include/configs/T1040QDS.h7
-rw-r--r--include/configs/T104xRDB.h7
-rw-r--r--include/configs/T208xQDS.h7
-rw-r--r--include/configs/T208xRDB.h7
-rw-r--r--include/configs/T4240QDS.h7
-rw-r--r--include/configs/T4240RDB.h7
-rw-r--r--include/configs/corenet_ds.h7
13 files changed, 91 insertions, 0 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 9063c57..32233c1 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -82,6 +82,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
@@ -759,6 +760,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* USB
*/
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 56a3e94..bc5af52 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -55,6 +55,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_TSEC_ENET
@@ -382,6 +383,12 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
#define CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index aeded6d..7be1a02 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -78,6 +78,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@@ -598,6 +599,12 @@ combinations. this should be removed later
#define CONFIG_DOS_PARTITION
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 715616d..5d11278 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -86,6 +86,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@@ -506,6 +507,12 @@
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 3219327..f58fba2 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -170,6 +170,7 @@
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#define CONFIG_PCI /* Enable PCI/PCIE */
@@ -832,6 +833,12 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_DOS_PARTITION
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 16f7525..bab0e1e 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -49,6 +49,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@@ -647,6 +648,12 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_DOS_PARTITION
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index a781ba3..2739193 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -58,6 +58,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controler 1 */
@@ -716,6 +717,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 5e2c100..eb2ca73 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -113,6 +113,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controler 1 */
@@ -731,6 +732,12 @@
#define CONFIG_CMD_NET
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 395472b..2268dd6 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -44,6 +44,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
@@ -777,6 +778,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e5936c7..b896d74 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -37,6 +37,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
@@ -736,6 +737,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index ca97247..e5d3f04 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -15,6 +15,7 @@
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
@@ -506,6 +507,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* USB
*/
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 183255d..4381c61 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -47,6 +47,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@@ -668,6 +669,12 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DOS_PARTITION
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
#define __USB_PHY_TYPE utmi
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 12b3296..ea0363a 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -57,6 +57,7 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
@@ -648,6 +649,12 @@
#define CONFIG_DOS_PARTITION
#endif
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
/*
* Miscellaneous configurable options
*/
generated by cgit v1.1 at 2024-12-24 14:47:13 +0000