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| author | Jeroen Hofstee <jeroen@myspectrum.nl> | 2014-01-15 17:58:54 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-01-17 08:04:32 -0500 |
| commit | 13fbde6e4f600d94f0a1fb6ae49c6b4888033cec (patch) | |
| tree | e70db939b0ffe7fd66a3b4accf90fc25a98a85d4 | |
| parent | 09b72d692f4bce6716a255433b93c9ae2c4cc315 (diff) | |
| download | u-boot-imx-13fbde6e4f600d94f0a1fb6ae49c6b4888033cec.zip u-boot-imx-13fbde6e4f600d94f0a1fb6ae49c6b4888033cec.tar.gz u-boot-imx-13fbde6e4f600d94f0a1fb6ae49c6b4888033cec.tar.bz2 | |
nand, gpmc: fix reading after switching ecc
The omap_gpmc allows switching ecc at runtime. Since
the NAND_SUBPAGE_READ flag is only set, it is kept when
switching to hw ecc, which is not correct. This leads to
calling chip->ecc.read_subpage which is not a valid
pointer. Therefore clear the flag when switching ecc so
reading in hw mode works again.
Cc: Scott Wood <scottwood@freescale.com>
Cc: Pekon Gupta <pekon@ti.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| -rw-r--r-- | drivers/mtd/nand/omap_gpmc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 790d538..389c4de 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -933,6 +933,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) mtd = &nand_info[nand_curr_device]; nand = mtd->priv; nand->options |= NAND_OWN_BUFFERS; + nand->options &= ~NAND_SUBPAGE_READ; /* Setup the ecc configurations again */ if (hardware) { if (eccstrength == 1) { |