summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStefano Babic <sbabic@denx.de>2011-10-06 11:23:33 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:31 +0200
commitf33bd087c6a6b833236cb2f327cab39fe218c38c (patch)
treed5870c0bad42b9cedf9aab2ec3188f8e58bc55a3
parent4380075e41237a4ec03954c1f827eea70fc25c93 (diff)
downloadu-boot-imx-f33bd087c6a6b833236cb2f327cab39fe218c38c.zip
u-boot-imx-f33bd087c6a6b833236cb2f327cab39fe218c38c.tar.gz
u-boot-imx-f33bd087c6a6b833236cb2f327cab39fe218c38c.tar.bz2
MX3: qong: use new pmic driver
Switch to new pmic generic driver. Signed-off-by: Stefano Babic <sbabic@denx.de>
-rw-r--r--board/davedenx/qong/qong.c11
-rw-r--r--include/configs/qong.h5
2 files changed, 12 insertions, 4 deletions
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index 9fca1f8..a9f2ef0 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -28,6 +28,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <nand.h>
+#include <pmic.h>
#include <fsl_pmic.h>
#include <asm/gpio.h>
#include "qong_fpga.h"
@@ -176,11 +177,15 @@ int board_init (void)
int board_late_init(void)
{
u32 val;
+ struct pmic *p;
+
+ pmic_init();
+ p = get_pmic();
/* Enable RTC battery */
- val = pmic_reg_read(REG_POWER_CTL0);
- pmic_reg_write(REG_POWER_CTL0, val | COINCHEN);
- pmic_reg_write(REG_INT_STATUS1, RTCRSTI);
+ pmic_reg_read(p, REG_POWER_CTL0, &val);
+ pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
+ pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
diff --git a/include/configs/qong.h b/include/configs/qong.h
index b1fc80c..f2a1e01 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -60,11 +60,14 @@
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
#define CONFIG_RTC_MC13783
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 100000
#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC_BITLEN 32
/* FPGA */
#define CONFIG_FPGA