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authorRobby Cai <r63905@freescale.com>2015-04-07 11:36:08 +0800
committerPeng Fan <Peng.Fan@freescale.com>2015-04-29 15:05:42 +0800
commitdf29a7d3502af80decb6fb6b4be73cbfdebf9105 (patch)
treee7f4caad711329592dd2dd5d7bfbd11ad5afad33
parent14e6dbd23aae92c7000cc47c7cb52fbdf3173d43 (diff)
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MLK-10569 imx7d: call set_epdc_qos unconditionally
This EPDC/EPXP QoS setting is needed for EPDC stress test to pass. This patch remove the #ifdef to make sure set_epdc_qos be called always. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit d2fb113740b2c67958862503dda2a40191ab0899) (cherry picked from commit 581aa86581bb1178c5df4ad5298e5b85c53f1186)
-rw-r--r--arch/arm/cpu/armv7/mx7/soc.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 79a9909..d88e986 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -121,7 +121,6 @@ static void imx_set_wdog_powerdown(bool enable)
writew(enable, &wdog4->wmcr);
}
-#if defined(CONFIG_MXC_EPDC)
static void set_epdc_qos(void)
{
#define REGS_QOS_BASE QOSC_IPS_BASE_ADDR
@@ -150,7 +149,6 @@ static void set_epdc_qos(void)
writel(0xe080, IOMUXC_GPR_BASE_ADDR + 0x0034); /* EPDC AW/AR CACHE ENABLE */
}
-#endif
int arch_cpu_init(void)
{
@@ -166,9 +164,8 @@ int arch_cpu_init(void)
mxs_dma_init();
#endif
-#if defined(CONFIG_MXC_EPDC)
set_epdc_qos();
-#endif
+
return 0;
}