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authorAxel Lin <axel.lin@ingics.com>2014-05-25 10:31:18 +0800
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-04 21:37:29 +0200
commitc0c374024dbd38b1045784cb2880ba21db552c54 (patch)
tree9eeec42e98b04eaa4c8b6d5620f5fcd46ab0eb1c
parentfcfddfd50472d7ce84ef4e2853242bbeb7b37325 (diff)
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gpio: spear_gpio: Fix gpio_set_value() implementation
In current gpio_set_value() implementation, it always sets the gpio control bit no matter the value argument is 0 or 1. Thus the GPIOs never set to low. This patch fixes this bug. The address bus is used as a mask on read/write operations, so that independent software drivers can set their GPIO bits without affecting any other pins in a single write operation. Thus we don't need a read-modify-write to update the register. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
-rw-r--r--drivers/gpio/spear_gpio.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index 367b670..6fb4117 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value)
{
struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
- writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
+ if (value)
+ writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
+ else
+ writel(0, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
return 0;
}