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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-03-14 17:48:48 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 14:54:09 +0800 |
| commit | bcd970ec12dbdcd7ace1d031a91722fb654fbbd2 (patch) | |
| tree | d0fcb2a03790c588b62fa3e28e9d6718b33d6f47 | |
| parent | 86d7d18b6fff71f4758c192127e22701560e82c3 (diff) | |
| download | u-boot-imx-bcd970ec12dbdcd7ace1d031a91722fb654fbbd2.zip u-boot-imx-bcd970ec12dbdcd7ace1d031a91722fb654fbbd2.tar.gz u-boot-imx-bcd970ec12dbdcd7ace1d031a91722fb654fbbd2.tar.bz2 | |
MLK-10774-11 mx6: clock: Modify GPMI clock to support mx6sx
On mx6sx, the CCM register bits for GPMI are different as other
mx6 platforms. Modify the GPMI clock function to support mx6sx.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 90dcd6d..8cd4f14 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -47,6 +47,18 @@ void setup_gpmi_io_clk(u32 cfg) MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); +#if defined(CONFIG_MX6SX) + clrbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); + + clrsetbits_le32(&imx_ccm->cs2cdr, + MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK | + MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK | + MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK, + cfg); + + setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); +#else + clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); clrsetbits_le32(&imx_ccm->cs2cdr, @@ -56,6 +68,7 @@ void setup_gpmi_io_clk(u32 cfg) cfg); setbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); +#endif setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | |