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authorStathis Voukelatos <stathisv@hotmail.com>2012-08-07 15:56:14 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:18 +0200
commit8b165a5394723786dc94385f7ccad928ee28013b (patch)
tree7a272a88a38e547fc10bf4de9c11a5da21fa530f
parent7fb1ed0eabd6aeb36dd107ea1ed1f7432064031e (diff)
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i.MX28: bug fixes in PMU configuration code
Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com>
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/spl_power_init.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 6dd3bfc..35106ba 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -720,7 +720,7 @@ int mxs_get_vddio_power_source_off(void)
tmp = readl(&power_regs->hw_power_vddioctrl);
if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
- POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+ POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
return 1;
}
}
@@ -728,7 +728,7 @@ int mxs_get_vddio_power_source_off(void)
if (!(readl(&power_regs->hw_power_5vctrl) &
POWER_5VCTRL_ENABLE_DCDC)) {
if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
- POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+ POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
return 1;
}
}
@@ -776,7 +776,7 @@ void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
- new_brownout = new_target - new_brownout;
+ new_brownout = (new_target - new_brownout + 25) / 50;
cur_target = readl(&power_regs->hw_power_vddioctrl);
cur_target &= POWER_VDDIOCTRL_TRG_MASK;
@@ -862,8 +862,8 @@ void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
}
clrsetbits_le32(&power_regs->hw_power_vddioctrl,
- POWER_VDDDCTRL_BO_OFFSET_MASK,
- new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+ POWER_VDDIOCTRL_BO_OFFSET_MASK,
+ new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
}
void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
@@ -873,7 +873,7 @@ void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
- new_brownout = new_target - new_brownout;
+ new_brownout = (new_target - new_brownout + 12) / 25;
cur_target = readl(&power_regs->hw_power_vdddctrl);
cur_target &= POWER_VDDDCTRL_TRG_MASK;