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authorMarian Balakowicz <m8@semihalf.com>2006-05-09 11:51:51 +0200
committerMarian Balakowicz <m8@semihalf.com>2006-05-09 11:51:51 +0200
commit6f5155a95cc6d4b80cda10785c64a55fbb18e8ee (patch)
treec690fefe017b60bdd9fad2b344fecd8898264547
parentb75ef85f42f75206a9a2c278c042e911c92ea28c (diff)
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Make R5200 specific low level initialization board conditional.
-rw-r--r--CHANGELOG2
-rw-r--r--cpu/mcf52x2/start.S24
-rw-r--r--include/configs/r5200.h1
3 files changed, 18 insertions, 9 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 1b44e70..f2d7985 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Make R5200 specific low level initialization board conditional.
+
* Update CPU target identification strings for Coldfire family.
* Update register definitions for MCF5271.
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 8ae9591..3ab812b 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -55,7 +55,7 @@
*/
_vectors:
-#ifndef CONFIG_M5271
+#ifndef CONFIG_R5200
.long 0x00000000, _START
#else
.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
@@ -142,7 +142,9 @@ _start:
/* Initialize RAMBAR1: locate SRAM and validate it */
move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
movec %d0, %RAMBAR1
-#ifdef CONFIG_M5271
+#endif
+
+#ifdef CONFIG_R5200
move.l #(_flash_setup-CFG_FLASH_BASE), %a0
move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
move.l #(CFG_INIT_RAM_ADDR), %a2
@@ -150,8 +152,6 @@ _copy_flash:
move.l (%a0)+, (%a2)+
cmp.l %a0, %a1
bgt.s _copy_flash
-#endif
-
jmp CFG_INIT_RAM_ADDR
_after_flash_copy:
#endif
@@ -174,18 +174,24 @@ _after_flash_copy:
bsr cpu_init_f /* run low-level CPU init code (from flash) */
bsr board_init_f /* run low-level board init code (from flash) */
- /* board_init_f() does not return
+ /* board_init_f() does not return */
/*------------------------------------------------------------------------------*/
-#ifdef CONFIG_M5271
+#ifdef CONFIG_R5200
_flash_setup:
- move.l #0x1000, %d0
+ /* CSAR0 */
+ move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
move.w %d0, 0x40000080
- move.l #0x2180, %d0
+
+ /* CSCR0 */
+ move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */
move.w %d0, 0x4000008A
- move.l #0x3f0001, %d0
+
+ /* CSMR0 */
+ move.l #0x001f0001, %d0 /* 2 MB, valid */
move.l %d0, 0x40000084
+
jmp _after_flash_copy.L
_flash_setup_end:
#endif
diff --git a/include/configs/r5200.h b/include/configs/r5200.h
index a17b4ab..7049704 100644
--- a/include/configs/r5200.h
+++ b/include/configs/r5200.h
@@ -37,6 +37,7 @@
*/
#define CONFIG_MCF52x2 /* define processor family */
#define CONFIG_M5271 /* define processor type */
+#define CONFIG_R5200 /* define board type */
#define FEC_ENET
#define CONFIG_NET_RETRY_COUNT 5