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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2013-04-11 09:36:01 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-04-12 07:55:08 +0200
commit66f30bf983bdc82a799d019401a88bfc720a5a05 (patch)
treebbd878bc18df9f547fcf142b6e7505fcce77b428
parente53232250b9dcff4915a6024f9951f52eadb4956 (diff)
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arm: Remove deprecated and now unused NAND SPL
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
-rw-r--r--arch/arm/config.mk2
-rw-r--r--arch/arm/cpu/arm1176/start.S12
-rw-r--r--arch/arm/lib/crt0.S16
3 files changed, 6 insertions, 24 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index e7839be..461899e 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -87,9 +87,7 @@ endif
endif
# needed for relocation
-ifndef CONFIG_NAND_SPL
LDFLAGS_u-boot += -pie
-endif
#
# FIXME: binutils versions < 2.22 have a bug in the assembler where
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 5654c19..a7cf728 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -51,7 +51,7 @@
.globl _start
_start: b reset
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -98,15 +98,11 @@ _end_vect:
.globl _TEXT_BASE
_TEXT_BASE:
-#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
- .word CONFIG_SYS_TEXT_BASE
-#else
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
.word CONFIG_SPL_TEXT_BASE
#else
.word CONFIG_SYS_TEXT_BASE
#endif
-#endif
/*
* Below variable is very important because we use MMU in U-Boot.
@@ -176,7 +172,7 @@ cpu_init_crit:
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
/*
* flush v4 I/D caches
*/
@@ -361,7 +357,7 @@ c_runtime_cpu_setup:
mov pc, lr
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
/*
* we assume that cache operation is done before. (eg. cleanup_before_linux())
* actually, we don't need to do anything about cache if not use d-cache in
@@ -539,4 +535,4 @@ fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq
-#endif /* CONFIG_NAND_SPL */
+#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index fa25319..a9657d1 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -64,7 +64,7 @@
* have some work left to do at this point regarding memory, so
* call c_runtime_cpu_setup.
*
- * 6. Branch to either nand_boot() or board_init_r().
+ * 6. Branch to board_init_r().
*/
/*
@@ -77,10 +77,7 @@ ENTRY(_main)
* Set up initial C runtime environment and call board_init_f(0).
*/
-#if defined(CONFIG_NAND_SPL)
- /* deprecated, use instead CONFIG_SPL_BUILD */
- ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
-#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr sp, =(CONFIG_SPL_STACK)
#else
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
@@ -129,21 +126,12 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */
bl coloured_LED_init
bl red_led_on
-#if defined(CONFIG_NAND_SPL)
-
- /* call _nand_boot() */
- ldr pc, =nand_boot
-
-#else
-
/* call board_init_r(gd_t *id, ulong dest_addr) */
mov r0, r8 /* gd_t */
ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */
/* call board_init_r */
ldr pc, =board_init_r /* this is auto-relocated! */
-#endif
-
/* we should not return here. */
#endif