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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2012-06-26 16:38:11 +0000
committerJoe Hershberger <joe.hershberger@ni.com>2012-07-23 22:00:58 -0500
commit631fea8f2d70aa5eb7c49b33039971dfc61bba88 (patch)
tree535181c035cd2aebee274b7f8376d1ae53cf3812
parent49afb8cafc5179f35a2ac44da59400b050102703 (diff)
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net: sh_eth: add support for SH7757's GETHER
SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757, the driver handles the GETHER. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-rw-r--r--drivers/net/sh_eth.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 13003ec..3703c55 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -282,8 +282,13 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee00000
#elif defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_SH_ETHER_USE_GETHER)
+#define SH_ETH_TYPE_GETHER
+#define BASE_IO_ADDR 0xfee00000
+#else
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef00000
+#endif
#elif defined(CONFIG_CPU_SH7724)
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xA4600000
@@ -331,7 +336,11 @@ enum DMAC_T_BIT {
/* GECMR */
enum GECMR_BIT {
+#if defined(CONFIG_CPU_SH7757)
+ GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
+#else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
+#endif
};
/* EDRRR*/