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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-04-08 19:12:19 +0530
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:50 -0700
commit49efe85b35e61fb50b00ca02354dfca0d3c5c46c (patch)
tree704d9384d77266177eec8bb29b38dbfc13958a78
parentb26df185c383f91e15ebd07e3b247c15d00b385e (diff)
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powerpc/mpc85xx: Avoid hardcoding in SPL linker script
SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/u-boot-spl.lds7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index acaa093..4fad68b 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -66,11 +66,16 @@ SECTIONS
} :text = 0xffff
#else
#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
- .bootpg ADDR(.text) + 0x1000 :
+#ifndef BOOT_PAGE_OFFSET
+#define BOOT_PAGE_OFFSET 0x1000
+#endif
+ .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
{
arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
}
+#ifndef RESET_VECTOR_OFFSET
#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
+#endif
#elif defined(CONFIG_FSL_ELBC)
#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
#else