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authorEric Nelson <eric.nelson@boundarydevices.com>2012-09-19 08:33:50 +0000
committerTom Rini <trini@ti.com>2012-10-15 11:54:09 -0700
commit344da71a2089a1523ed0690d8a7b089b9f278634 (patch)
tree5880e9f79f1b2bc87eb97de50eb3050c233e978b
parentda6df2d1c8ca6075e4f15bf825cd5fa3f2322981 (diff)
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i.MX6: define bitfields for CHSCCDR register
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
-rw-r--r--arch/arm/include/asm/arch-mx6/crm_regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index f066461..d670f30 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -294,6 +294,10 @@ struct mxc_ccm_reg {
#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)
#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0
+#define CHSCCDR_CLK_SEL_LDB_DI0 3
+#define CHSCCDR_PODF_DIVIDE_BY_3 2
+#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5
+
/* Define the bits in register CSCDR2 */
#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F << 19)
#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19